Martin Povišer
ec42b42bd9
cellmatch: Size the lut attribute
2024-10-02 11:29:54 +02:00
Martin Povišer
38de01807e
Mark bufnorm experimental
2024-09-17 10:46:20 +02:00
Claire Xenia Wolf
80119386c0
Add RTLIL "buffered-normalized mode" and improve "bufnorm" pass
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2024-09-17 10:46:20 +02:00
Claire Xenia Wolf
8bb70bac8d
Improvements in "bufnorm" pass
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2024-09-17 10:46:20 +02:00
Claire Xenia Wolf
d027ead4b5
Improvements in "bufnorm" pass
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2024-09-17 10:46:20 +02:00
Claire Xenia Wolf
f4b7ea5fb3
Improvements in "bufnorm" pass
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2024-09-17 10:46:20 +02:00
Claire Xenia Wolf
32808a0393
Improvements and fixes to "bufnorm" cmd
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2024-09-17 10:46:20 +02:00
Claire Xenia Wolf
d0b5dfa6ef
Add bufnorm pass
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2024-09-17 10:46:20 +02:00
Emil J. Tywoniak
f193bcf683
clockgate: help string
2024-09-16 14:20:33 +02:00
Emil J. Tywoniak
be7c93ec6d
clockgate: 1-bit const 0
2024-09-16 13:58:27 +02:00
Emil J
a8a92d3469
clockgate: help string
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Co-authored-by: Martin Povišer <povik@cutebit.org>
2024-09-16 13:55:53 +02:00
Emil J. Tywoniak
1e999a3cb7
clockgate: EN can be a bit on a multi-bit wire
2024-09-11 19:18:25 +02:00
Emil J. Tywoniak
8b464341c2
clockgate: no initvals
2024-09-11 10:24:48 +02:00
Emil J. Tywoniak
7e473299bd
clockgate: bail on constant signals
2024-09-09 21:20:19 +02:00
Emil J. Tywoniak
e64fceef70
clockgate: prototype clock gating
2024-09-09 15:00:54 +02:00
Krystine Sherwin
7b47f645d7
Address warnings
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- Setting default values
- Fixing mismatched types
- Guarding unused var
2024-08-16 04:30:31 +12:00
Martin Povišer
3057c13a66
Improve libparse encapsulation
2024-08-13 18:47:36 +02:00
Martin Povišer
78382eaa6f
libparse: Adjust whitespace
2024-08-13 18:47:36 +02:00
Emil J. Tywoniak
e939182e68
cellmatch: add comments
2024-05-03 16:42:41 +02:00
Martin Povišer
b143e5678f
cellmatch: Rename the special design to $cellmatch
2024-05-03 16:42:41 +02:00
Martin Povišer
c0e68dcc4d
cellmatch: Add debug print
2024-05-03 16:42:41 +02:00
Martin Povišer
6a9858cdad
cellmatch: Delegate evaluation to ConstEval
2024-05-03 16:42:41 +02:00
Martin Povišer
86e1080f05
cellmatch: New pass
2024-05-03 16:42:41 +02:00
Martin Povišer
6ff4ecb2b4
techmap: Remove techmap_chtype from the result
2024-05-03 13:33:28 +02:00
Martin Povišer
fc82251105
techmap: Support dynamic cell types
2024-05-03 13:33:28 +02:00
Peter Gadfort
a48825a604
add support for using ABCs library merging when providing multiple liberty files
2024-04-12 13:57:29 -04:00
N. Engelhardt
e4f11eb0a0
Merge pull request #4228 from povik/synth-inject
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synth: Introduce `-extra-map` for amending techmap
2024-03-11 14:55:45 +01:00
Roland Coeurjoly
4a2fb18718
Changes in libs, passes and tests Makefiles. LDLIBS -> LIBS. LDFLAGS -> LINKFLAGS. CXX is clang++ or g++, not clang and gcc
2024-02-25 17:23:56 +01:00
Roland Coeurjoly
033fa10307
We use CXX instead of LD for linking yosys-filterlib
2024-02-25 16:49:28 +01:00
Martin Povišer
53ca7b48f8
techmap: Fix help message wording
2024-02-22 22:00:56 +01:00
Austin Rovinski
03cadf6474
dfflibmap: use patmatch() from kernel/yosys.cc
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Replace OS matching functions with yosys kernel function
Signed-off-by: Austin Rovinski <rovinski@nyu.edu>
2024-02-20 11:04:55 -05:00
Austin Rovinski
5059bb1d4f
dfflibmap: force PathMatchSpecA on WIN32
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Depending on the WIN32 compilation mode, PathMatchSpec may expect a LPCSTR or
LPCWSTR argument. char* is only convertable to LPCSTR, so use that
implementation
Signed-off-by: Austin Rovinski <rovinski@nyu.edu>
2024-02-19 14:40:46 -05:00
Austin Rovinski
689feed012
dfflibmap: Add a -dont_use flag to ignore cells
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This is an alternative to setting the dont_use property in lib. This brings
dfflibmap in parity with the abc pass for dont_use.
Signed-off-by: Austin Rovinski <rovinski@nyu.edu>
2024-02-19 13:00:18 -05:00
Miodrag Milanović
edb95c69a9
Merge pull request #4084 from jix/scopeinfo
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$scopeinfo support
2024-02-12 09:51:22 +01:00
Martin Povišer
af1a5cfeb9
Address SigBit/SigSpec confusion issues under c++20
2024-02-08 17:48:36 +01:00
Jannis Harder
8902fc94b6
Suport $scopeinfo in flatten and opt_clean
2024-02-06 17:51:29 +01:00
Martin Povišer
d6566eb344
booth: Redo baseline architecture summation
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Redo the summation logic: strive for some degree of balance on the
generated Wallace tree, emit an `$add` cell for the final summation.
2023-11-22 15:47:11 +01:00
Martin Povišer
beb5cb55a5
booth: Expose -lowpower option
2023-11-22 15:29:59 +01:00
Martin Povišer
7005ea9411
booth: Revisit help
2023-11-22 15:29:59 +01:00
Martin Povišer
48b73be8c6
booth: Replace the default signed architecture
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Generalize what was formerly the unsigned-only architecture to support
both signed and unsigned multiplication, use that as default, and set
aside the special low-power architecture that was formerly used for
signed multipliers.
2023-11-22 15:29:59 +01:00
Martin Povišer
f50894d8bf
booth: Drop extra decoder arguments
2023-11-22 15:29:54 +01:00
Martin Povišer
579f6bdc17
booth: Do not special-case bottom rows
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Later on all the rows are cropped to the target size anyway, so there's
no harm in transitionally including extra top bits.
2023-11-22 15:12:15 +01:00
Martin Povišer
da207cdce0
booth: Make less assumptions when aligning partial products
2023-11-22 15:12:15 +01:00
Martin Povišer
69e994ff75
booth: Clean unused FA index variable
2023-11-22 12:47:09 +01:00
Martin Povišer
d8408b2350
booth: Move up signed quadrant 1 logic
2023-11-22 12:46:15 +01:00
Martin Povišer
8d33cc2fb6
booth: Refactor signed CPA
2023-11-22 12:46:15 +01:00
Martin Povišer
00e899f98d
booth: Refactor signed multiplier full adders emission
2023-11-22 12:46:15 +01:00
Lofty
d21c464ae4
Merge pull request #3946 from rmlarsen/toposort
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Speed up TopoSort by 2.7-3.3x.
2023-10-17 13:00:18 +01:00
Adrian Parvin Ouano
535ecf84ac
alumacc: merge independent of sign
2023-10-08 01:23:14 +08:00
Adrian Parvin Ouano
74d38db3b5
alumacc: merge eq independent of sign
2023-10-08 01:23:14 +08:00
