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4 commits

Author SHA1 Message Date
Eddie Hung b97fe6e866 Work in progress for renaming labels/options in synth_xilinx 2019-07-18 14:20:43 -07:00
Eddie Hung efd04880db Add RAM32X1D support 2019-06-24 16:16:50 -07:00
Clifford Wolf 229825e1b8 Xilinx DRAMS: RAM64X1D, RAM128X1D 2015-04-09 13:37:07 +02:00
Clifford Wolf b00cad81d7 Towards DRAM support in Xilinx flow 2015-04-09 08:17:14 +02:00