12 commits

Author	SHA1	Message	Date
Clifford Wolf	cc4f10883b	Renamed RTLIL::{Module,Cell}::connections to connections_	2014-07-26 11:58:03 +02:00
Clifford Wolf	6aa792c864	Replaced more old SigChunk programming patterns	2014-07-24 23:10:58 +02:00
Clifford Wolf	4b4048bc5f	SigSpec refactoring: using the accessor functions everywhere	2014-07-22 20:39:37 +02:00
Clifford Wolf	a233762a81	SigSpec refactoring: renamed chunks and width to __chunks and __width	2014-07-22 20:39:37 +02:00
Clifford Wolf	28093d9dd2	Added "top" attribute to mark top module in hierarchy	2013-11-24 05:03:43 +01:00
Clifford Wolf	295e352ba6	Renamed "placeholder" to "blackbox"	2013-11-22 15:01:12 +01:00
Clifford Wolf	2864cb3b59	Silenced a gcc warning in spice backend	2013-11-09 12:01:50 +01:00
Clifford Wolf	1dcb683fcb	Write yosys version to output files	2013-11-03 21:41:39 +01:00
Clifford Wolf	e9dede01ca	Fixed handling of boolean attributes (backends)	2013-10-24 11:27:30 +02:00
Clifford Wolf	28069e8a10	A couple of small fixes in SPICE backend	2013-09-15 12:19:06 +02:00
Clifford Wolf	2c9bd23801	Added spice testbench to techlibs/cmos	2013-09-14 13:29:11 +02:00
Clifford Wolf	bbe5aa446b	Added spice backend	2013-09-14 11:23:45 +02:00