whitequark
c6b5b18a30
Merge pull request #2442 from cr1901/sccache
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Makefile: Add disabled-by-default ENABLE_SCCACHE config option.
2020-11-25 02:48:39 +00:00
whitequark
2a39c785a2
Merge pull request #2450 from nitz/sim-vcd-filename
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Add rewrite_filename for sim -vcd argument.
2020-11-25 02:48:10 +00:00
William D. Jones
9431033921
Makefile: Update ABCREV to bring in sccache fixes.
2020-11-24 21:32:27 -05:00
Yosys Bot
88c47a380b
Bump version
2020-11-25 00:10:05 +00:00
Robert Baruch
278b542273
Cleans up some descriptions and syntax
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Now all rules ending in "-stmt" end in eol.
2020-11-24 15:27:30 -08:00
Chris Dailey
cdc802e4b7
Add rewrite_filename for sim -vcd argument.
2020-11-24 15:17:16 -05:00
whitequark
bc085761e6
Merge pull request #2428 from whitequark/check-processes
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check: add support for processes
2020-11-24 15:04:42 +00:00
Miodrag Milanović
5cf738b66a
Merge pull request #2448 from nitz/tcl-script-documentation-fixes
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Tcl script documentation fixes
2020-11-24 07:51:56 +01:00
Miodrag Milanović
b8d3f13307
Merge pull request #2295 from epfl-vlsc/firrtl_blackbox_generic_parameters
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Add firrtl backend support for generic parameters in blackbox components
2020-11-24 07:50:17 +01:00
nitz
cc0d7244b8
tcl -h message only if YOSYS_ENABLE_TCL defined.
2020-11-23 21:48:44 -05:00
Sahand Kashani
930a6ae7db
Formatting fixes
2020-11-23 10:55:09 +01:00
Robert Baruch
d3d28e287f
Adds missing "end" and eol to module.
2020-11-22 21:08:58 -08:00
Robert Baruch
c5a2ae01cd
Update to Values #2
2020-11-22 18:50:41 -08:00
Robert Baruch
5159dda826
Update to Values section
2020-11-22 18:48:21 -08:00
Robert Baruch
1034422c58
Adds appendix on RTLIL text format
2020-11-22 12:56:29 -08:00
Yosys Bot
949eb95593
Bump version
2020-11-21 00:10:06 +00:00
Miodrag Milanović
de58e774ef
Merge pull request #2443 from YosysHQ/dave/nexus-mult-infer
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nexus: Multiplier inference support
2020-11-20 10:30:56 +01:00
David Shah
9f241c9a42
nexus: DSP inference support
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-20 08:45:55 +00:00
William D. Jones
296a23f489
Makefile: Add disabled-by-default ENABLE_SCCACHE config option.
2020-11-19 13:23:54 -05:00
Yosys Bot
5b35d953f7
Bump version
2020-11-19 00:10:10 +00:00
Miodrag Milanović
c8d809897f
Merge pull request #2441 from YosysHQ/dave/nexus_dsp_sim
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nexus: Add DSP simulation model
2020-11-18 12:22:05 +01:00
David Shah
923843b3fa
nexus: Add DSP simulation model
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-18 10:21:17 +00:00
Miodrag Milanovic
aa4d94f7d8
Fix duplicated parameter name typo
2020-11-18 10:03:57 +01:00
Yosys Bot
58e8901fee
Bump version
2020-11-17 00:10:06 +00:00
William Woodruff
c7cf9415f8
backends/blif: Remove unused vector of strings ( #2420 )
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* backends/blif: Remove unused vector of strings
For reasons that are unclear to me, this was being used to store every
result of `cstr` before returning them. The vector was never accessed otherwise,
resulting in a huge unnecessary memory sink when emitting to BLIF.
* backends/blif: Remove CSTR macro
* backends/blif: Actually call str()
2020-11-16 09:31:48 +01:00
Miodrag Milanović
2ee5db0211
Merge pull request #2438 from kbeckmann/gowin_rpll
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synth_gowin: Add rPLL blackbox
2020-11-16 09:30:54 +01:00
Konrad Beckmann
5b9a975eba
synth_gowin: Add rPLL blackbox
2020-11-11 17:06:54 +01:00
dalance
84ecb321b4
Fix begin/end in generate
2020-11-11 12:03:37 +09:00
Yosys Bot
71ca9a8253
Bump version
2020-11-11 00:10:17 +00:00
Miodrag Milanović
924f1713c2
Merge pull request #2433 from YosysHQ/paths_as_globals
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Expose abc and data paths as globals for pyosys
2020-11-10 08:05:42 +01:00
Yosys Bot
014c7e26b8
Bump version
2020-11-08 00:10:06 +00:00
whitequark
630be7e11a
Merge pull request #2414 from zeldin/abc-depend-clang-fix
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Prevent CXXFLAGS from leaking to abc Makefile
2020-11-07 18:48:03 +00:00
Marcus Comstedt
5594594e16
Prevent CXXFLAGS from leaking to abc Makefile
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This fixes an issue with abc/depends.sh when the compiler is clang.
2020-11-07 16:02:49 +01:00
Miodrag Milanović
6940ef933a
Merge pull request #2432 from Xiretza/nexus-tests
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Update nexus arch tests to new harness
2020-11-07 15:07:45 +01:00
Miodrag Milanovic
829b5cca60
Expose abc and data paths as globals
2020-11-06 14:17:15 +01:00
whitequark
d6a93b8b90
check: add support for processes.
2020-11-03 15:36:27 +00:00
whitequark
191406f930
check: reformat log/help text to match most other passes
2020-11-03 12:37:02 +00:00
Yosys Bot
e7f36d01e4
Bump version
2020-11-03 00:10:05 +00:00
whitequark
c9e6a5b854
Merge pull request #2426 from whitequark/cxxrtl-auto-top
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cxxrtl: run `hierarchy -auto-top` if no top module is present
2020-11-02 20:58:10 +00:00
whitequark
65083e9520
cxxrtl: run hierarchy -auto-top if no top module is present.
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In most cases, a CXXRTL simulation would use a top module, either
because this module serves as an entry point to the CXXRTL C API,
or because the outputs of a top module are unbuffered, improving
performance. Taking this into account, the CXXRTL backend now runs
`hierarchy -auto-top` if there is no top module. For the few cases
where this behavior is unwanted, it now accepts a `-nohierarchy`
option.
Fixes #2373 .
2020-11-02 19:18:56 +00:00
Yosys Bot
d9af3cadf8
Bump version
2020-11-02 00:10:06 +00:00
whitequark
bbaf8693c6
Merge pull request #2425 from whitequark/cxxrtl-meminit-constness
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cxxrtl: don't assert on non-constant $meminit inputs
2020-11-01 17:08:42 +00:00
whitequark
2ba05f5c31
cxxrtl: don't assert on non-constant $meminit inputs.
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Fixes #2129 .
2020-11-01 15:57:20 +00:00
whitequark
cc7ad65a79
Merge pull request #2424 from whitequark/cxxrtl-multiple-drivers
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cxxrtl: don't assert on wires with multiple drivers
2020-11-01 13:52:59 +00:00
whitequark
cdf4ce9871
cxxrtl: don't assert on wires with multiple drivers.
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Fixes #2374 .
2020-11-01 12:49:30 +00:00
Yosys Bot
56054f2ce3
Bump version
2020-11-01 00:10:05 +00:00
whitequark
dfeff65c2b
Merge pull request #2416 from QuantamHD/master
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Adds support for defining abc location at runtime
2020-10-31 07:59:44 +00:00
Yosys Bot
166a84bdb8
Bump version
2020-10-31 00:10:15 +00:00
Miodrag Milanovic
c228cb74d6
Update verific version
2020-10-30 08:32:59 +01:00
Xiretza
86e0440da9
Update nexus arch tests to new harness
2020-10-29 14:42:07 +01:00
