mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-05 02:40:25 +00:00
Code Activity
1326 commits 116 branches 56 tags 43 MiB
Commit graph

4 commits

Author SHA1 Message Date
Clifford Wolf
cc4f10883b Renamed RTLIL::{Module,Cell}::connections to connections_ 2014-07-26 11:58:03 +02:00
Clifford Wolf
4b4048bc5f SigSpec refactoring: using the accessor functions everywhere 2014-07-22 20:39:37 +02:00
Clifford Wolf
a233762a81 SigSpec refactoring: renamed chunks and width to __chunks and __width 2014-07-22 20:39:37 +02:00
Clifford Wolf
6644f80d97 Moved some passes to other source directories 2014-02-08 14:39:15 +01:00
Renamed from passes/scc/scc.cc (Browse further)