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Author	SHA1	Message	Date
Clifford Wolf	82bbd2f077	Use undef (x/z vs. NaN) rules for real values from IEEE Std 1800-2012	2014-06-16 15:05:37 +02:00
Clifford Wolf	0c4c79c4c6	Fixed parsing of TOK_INTEGER (implies TOK_SIGNED)	2014-06-16 15:02:40 +02:00
Clifford Wolf	5bfe865cec	Added found_real feature to AstNode::detectSignWidth	2014-06-16 15:00:57 +02:00
Clifford Wolf	b1b96d199f	Added more calls to "hierarchy" to README file	2014-06-15 11:51:51 +02:00
Clifford Wolf	398482eced	Removed long running tests from tests/simple/realexpr.v (replaced by tests/realmath)	2014-06-15 09:39:22 +02:00
Clifford Wolf	a4ec19c25c	Added tests/realmath to "make test"	2014-06-15 09:31:03 +02:00
Clifford Wolf	4d1df128fa	Improved AstNode::realAsConst for large numbers	2014-06-15 09:27:09 +02:00
Clifford Wolf	656685fa31	Improved realmath test bench	2014-06-15 08:48:41 +02:00
Clifford Wolf	7f57bc8385	Improved parsing of large integer constants	2014-06-15 08:48:17 +02:00
Clifford Wolf	48dc6ab98d	Improved AstNode::asReal for large integers	2014-06-15 08:38:31 +02:00
Clifford Wolf	11d2add1b9	improved realmath test bench	2014-06-14 21:00:51 +02:00
Clifford Wolf	149fe83a8d	improved (fixed) conversion of real values to bit vectors	2014-06-14 21:00:51 +02:00
Clifford Wolf	39eb347c67	progress in realmath test bench	2014-06-14 19:56:22 +02:00
Clifford Wolf	d5765b5e14	Fixed relational operators for const real expressions	2014-06-14 19:33:58 +02:00
Clifford Wolf	ebe2d73330	added first draft of real math testcase generator	2014-06-14 19:24:01 +02:00
Clifford Wolf	1a487303a0	Progress in presentation	2014-06-14 16:45:16 +02:00
Clifford Wolf	22a998903b	Added %D and %c select commands	2014-06-14 16:19:32 +02:00
Clifford Wolf	f3b4a9dd24	Added support for math functions	2014-06-14 13:36:23 +02:00
Clifford Wolf	406f86a91e	Added realexpr.v test case	2014-06-14 12:01:17 +02:00
Clifford Wolf	9bd7d5c468	Added handling of real-valued parameters/localparams	2014-06-14 12:00:47 +02:00
Clifford Wolf	fc7b6d172a	Implemented more real arithmetic	2014-06-14 11:27:05 +02:00
Clifford Wolf	442a8e2875	Implemented basic real arithmetic	2014-06-14 08:51:22 +02:00
Clifford Wolf	9dd16fa41c	Added real->int convertion in ast genrtlil	2014-06-14 07:44:19 +02:00
Clifford Wolf	7ef0da32cd	Added Verilog lexer and parser support for real values	2014-06-13 11:29:23 +02:00
Clifford Wolf	482d9208aa	Added read_verilog -sv options, added support for bit, logic, ... allways_ff, always_comb, and always_latch	2014-06-12 11:54:20 +02:00
Clifford Wolf	9a6cd64fc2	Now we are in Yoys 0.3.0+ development	2014-06-08 15:31:27 +02:00
Clifford Wolf	ca125bf41b	Tagging Yosys 0.3.0	2014-06-08 15:28:36 +02:00
Clifford Wolf	94e9ee6bab	Updated ABC to 7600ffb9340c	2014-06-08 10:12:39 +02:00
Clifford Wolf	3af7c69d1e	added tests for new verilog features	2014-06-07 12:26:11 +02:00
Clifford Wolf	744e518467	fixed cell array handling of positional arguments	2014-06-07 12:17:11 +02:00
Clifford Wolf	e275e8eef9	Add support for cell arrays	2014-06-07 11:48:50 +02:00
Clifford Wolf	0b1ce63a19	Added support for repeat stmt in const functions	2014-06-07 10:47:53 +02:00
Clifford Wolf	7c8a7b2131	further improved const function support	2014-06-07 00:02:05 +02:00
Clifford Wolf	5281562d0e	made the generate..endgenrate keywords optional	2014-06-06 23:05:01 +02:00
Clifford Wolf	76da2fe172	improved const function support	2014-06-06 22:55:02 +02:00
Clifford Wolf	5c10d2ee36	fix functions with no block (but single statement, loop, etc.)	2014-06-06 21:29:23 +02:00
Clifford Wolf	c82db39935	Added tests/simple/repwhile.v	2014-06-06 17:47:20 +02:00
Clifford Wolf	ab54ce17c8	improved ast simplify of const functions	2014-06-06 17:40:45 +02:00
Clifford Wolf	b5cd7a0179	added while and repeat support to verilog parser	2014-06-06 17:40:04 +02:00
Clifford Wolf	f9c1cd5edb	Improved error message for options after front-end filename arguments	2014-06-04 09:10:50 +02:00
Clifford Wolf	7020f7fc13	added tee cmd	2014-06-03 09:23:31 +02:00
Clifford Wolf	68c99bf734	Fixed log messages in memory_dff	2014-06-01 11:32:27 +02:00
Clifford Wolf	d5497f770b	Updated ABC to rev fa4404b395f0	2014-05-29 11:03:15 +02:00
Clifford Wolf	61883b30f3	Merge pull request #36 from hansiglaser/master ... Various changes merged	2014-05-29 10:26:55 +02:00
Johann Glaser	278085fa01	added log_header to miter and expose pass, show cell type for exposed ports	2014-05-28 18:05:38 +02:00
Johann Glaser	63dfbb18cf	new flags -ignore_miss_func and -ignore_miss_dir for read_liberty	2014-05-28 16:50:13 +02:00
Johann Glaser	684c85902d	be more verbose when techmap yielded processes	2014-05-26 17:13:41 +02:00
Clifford Wolf	68c059565a	Fixed bug in opt_reduce (see vloghammer issue_044)	2014-05-12 12:45:47 +02:00
Clifford Wolf	f69b5800c9	fixed syntax error in dot file created by "show" command	2014-05-10 16:22:56 +02:00
Clifford Wolf	973959c7ea	Merge branch 'master' of github.com:cliffordwolf/yosys	2014-05-09 18:24:13 +02:00