13 commits

Author	SHA1	Message	Date
Clifford Wolf	a6750b3753	Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)	2014-02-03 13:01:45 +01:00
Ahmed Irfan	0325efe172	root bug corrected	2014-01-25 19:33:24 +01:00
Ahmed Irfan	137742786e	removed regex include	2014-01-24 18:04:37 +01:00
Ahmed Irfan	2e44b1b73a	merged clifford changes + removed regex	2014-01-24 17:35:42 +01:00
Clifford Wolf	210dda286f	Use techmap -share_map in btor scripts	2014-01-24 15:52:16 +01:00
Clifford Wolf	6804edd5d4	Moved btor scripts to backends/btor/	2014-01-24 15:48:07 +01:00
Ahmed Irfan	aa3cb20e1e	slice bug corrected	2014-01-20 18:35:52 +01:00
Ahmed Irfan	c347f2825f	assert feature	2014-01-20 10:45:02 +01:00
Ahmed Irfan	9a689f33a5	verilog default options pull ... shift operator width issues	2014-01-17 19:32:35 +01:00
Ahmed Irfan	c7a2e582aa	slice error corrected	2014-01-16 20:16:01 +01:00
Ahmed Irfan	3a1490888d	width issues ... dff cell for more than one registers	2014-01-15 17:36:33 +01:00
Ahmed Irfan	661b5a993e	BTOR backend	2014-01-14 12:03:53 +01:00
Ahmed Irfan	ffd768ce86	btor	2014-01-03 10:52:44 +01:00