3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-28 11:25:53 +00:00
Commit graph

4 commits

Author SHA1 Message Date
Eddie Hung
1c7d721558 Reject if not minlen from inside pattern matcher 2019-08-21 14:26:24 -07:00
Eddie Hung
cab2bd083e Get wire via SigBit 2019-08-21 13:47:47 -07:00
Eddie Hung
52fea5b658 Respect \keep on cells or wires 2019-08-21 13:42:03 -07:00
Eddie Hung
0250712486 Initial progress on xilinx_srl 2019-08-21 12:50:49 -07:00