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3 commits

Author SHA1 Message Date
Emil J. Tywoniak
054de3c236 tests: remove unstable FPGA synthesis result checks 2025-10-21 21:21:05 +00:00
Anhijkt
ca8af1f8c8 opt_dff: implement simplify_patterns 2025-07-21 14:15:26 +03:00
Martin Povišer
6672b6c1b3 quicklogic: Move pp3 tests one level down 2023-12-04 15:52:02 +01:00
Renamed from tests/arch/quicklogic/fsm.ys (Browse further)