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1621 commits

Author SHA1 Message Date
Catherine
94170388a9 fmt: if enabled, group padding zeroes.
Before this commit, the combination of `_` and `0` format characters
would produce a result like `000000001010_1010`.
After this commit, it would be `0000_0000_1010_1010`.

This has a slight quirk where a format like `{:020_b}` results in
the output `0_0000_0000_1010_1010`, which is one character longer than
requested. Python has the same behavior, and it's not clear what would
be strictly speaking correct, so Python behavior is implemented.
2024-04-02 12:13:22 +02:00
Catherine
27cb4c52b4 fmt: allow padding characters other than '0' and ' '.
When converted to Verilog, padding characters are replaced with one of
these two. Otherwise padding is performed with exactly that character.
2024-04-02 12:13:22 +02:00
Catherine
ddf7b46955 fmt,cxxrtl: fix printing of non-decimal signed numbers.
Also fix interaction of `NUMERIC` justification with `show_base`.
2024-04-02 12:13:22 +02:00
Catherine
00c5b60dfd fmt,cxxrtl: add option to group digits in numbers.
The option is serialized to RTLIL as `_` (to match Python's option with
the same symbol), and sets the `group` flag. This flag inserts an `_`
symbol between each group of 3 digits (for decimal) or four digits (for
binary, hex, and octal).
2024-04-02 12:13:22 +02:00
Catherine
7b94599162 fmt,cxxrtl: add option to print numeric base (0x, etc).
The option is serialized to RTLIL as `#` (to match Python's and Rust's
option with the same symbol), and sets the `show_base` flag. Because
the flag is called `show_base` and not e.g. `alternate_format` (which
is what Python and Rust call it), in addition to the prefixes `0x`,
`0X`, `0o`, `0b`, the RTLIL option also prints the `0d` prefix.
2024-04-02 12:13:22 +02:00
Catherine
bf5a960668 fmt,cxxrtl: add UNICHAR format type.
This format type is used to print an Unicode character (code point) as
its UTF-8 serialization. To this end, two UTF-8 decoders (one for fmt,
one for cxxrtl) are added for rendering. When converted to a Verilog
format specifier, `UNICHAR` degrades to `%c` with the low 7 bits of
the code point, which has equivalent behavior for inputs not exceeding
ASCII. (SystemVerilog leaves source and display encodings completely
undefined.)
2024-04-02 12:13:22 +02:00
Catherine
1780e2eb1e fmt,cxxrtl: add support for NUMERIC justification.
Before this commit, the existing alignments were `LEFT` and `RIGHT`,
which added the `padding` character to the right and left just before
finishing formatting. However, if `padding == '0'` and the alignment is
to the right, then the padding character (digit zero) was added after
the sign, if one is present.

After this commit, the special case for `padding == '0'` is removed,
and the new justification `NUMERIC` adds the padding character like
the justification `RIGHT`, except after the sign, if one is present.
(Space, for the `SPACE_MINUS` sign mode, counts as the sign.)
2024-04-02 12:13:22 +02:00
Catherine
6d6b138607 fmt,cxxrtl: support {,PLUS_,SPACE_}MINUS integer formats.
The first two were already supported with the `plus` boolean flag.
The third one is a new specifier, which is allocated the ` ` character.
In addition, `MINUS` is now allocated the `-` character, but old format
where there is no `+`, `-`, or `-` in the respective position is also
accepted for compatibility.
2024-04-02 12:13:22 +02:00
Catherine
8388846e3a fmt,cxxrtl: add support for uppercase hex format.
This is necessary for translating Python format strings in Amaranth.
2024-04-02 12:13:22 +02:00
Catherine
a5441bc00c fmt: FmtPart::{STRING→LITERAL},{CHARACTER→STRING}.
Before this commit, the `STRING` variant inserted a literal string;
the `CHARACTER` variant inserted a string. This commit renames them
to `LITERAL` and `STRING` respectively.
2024-04-02 12:13:22 +02:00
N. Engelhardt
c98cdc2a42
Merge pull request #4184 from povik/check-loop-edges
Use cell edges data in `check`, improve messages
2024-03-25 16:19:35 +01:00
Krystine Sherwin
3eeefd23e3
Typo fixup(s) 2024-03-18 11:09:23 +13:00
Krystine Sherwin
d2bf5a83af
Merge branch 'origin/master' into krys/docs 2024-03-18 10:39:30 +13:00
Miodrag Milanovic
5e05300e7b fix compile warning 2024-03-11 10:55:09 +01:00
Martin Povišer
d01728aaa5 celledges: Register async FF paths 2024-03-11 10:45:36 +01:00
Martin Povišer
87e72ef86f celledges: Add read ports arst paths 2024-03-11 10:45:17 +01:00
Martin Povišer
4a10e78777 celledges: Emit empty edges for write/init ports 2024-03-11 10:45:17 +01:00
Martin Povišer
3a1ef44564 celledges: Describe asynchronous read ports 2024-03-11 10:45:17 +01:00
Martin Povišer
6e5f40e364 utils: Save detected loops with their nodes in-order 2024-03-11 10:43:49 +01:00
N. Engelhardt
d70113a909
Merge pull request #3972 from nakengelhardt/celledges_shift_ops
celledges: support shift ops
2024-03-08 09:35:47 +01:00
Krystine Sherwin
1455941ab9
Merge branch 'master' into krys/docs 2024-03-05 05:48:46 +13:00
Jason Thorpe
a02d4e7853 Tweak the FreeBSD version of proc_self_dirname() to work on NetBSD use it. 2024-03-03 07:54:39 -08:00
Martin Povišer
dd11a5a37c Shrink further 2024-02-26 16:25:46 +01:00
Martin Povišer
b5b737de38 Shrink a bit more 2024-02-22 22:20:35 +01:00
Martin Povišer
f7737a12ca Cut down startup banner 2024-02-22 22:14:32 +01:00
Martin Povišer
173f4b5fbd Bump Claire's notices 2024-02-22 22:03:44 +01:00
Martin Povišer
f5013d035e rtlil: Fix Const hashing omission 2024-02-19 15:45:54 +01:00
Jannis Harder
3473b6dd27
Merge pull request #4206 from povik/cli-crashes
driver: Fix crashes on missing cli arguments
2024-02-12 16:39:38 +01:00
Martin Povišer
54a97f8bb7 driver: Fix crashes on missing cli arguments 2024-02-12 14:56:23 +01:00
Miodrag Milanović
edb95c69a9
Merge pull request #4084 from jix/scopeinfo
$scopeinfo support
2024-02-12 09:51:22 +01:00
Martin Povišer
66479a2232 hashlib: Add missing stdint.h include
We use `uint32_t` `uint64_t` etc. so add an explicit include.
2024-02-08 14:27:12 +00:00
Miodrag Milanovic
a38273c19d add log_suppressed and fixed formatting 2024-02-08 12:19:42 +01:00
Miodrag Milanovic
2797d67569 Move block and change message to debug 2024-02-08 09:19:19 +01:00
Miodrag Milanovic
f785eef685 Merge branch 'master' of github.com:hakan-demirli/yosys into xdg 2024-02-08 09:03:52 +01:00
Jannis Harder
0d5b48de98 Add scopeinfo index/lookup utils 2024-02-06 18:01:26 +01:00
Jannis Harder
f728927307 Add builtin celltype $scopeinfo
Only declares the cell interface, doesn't make anything use or
understand $scopeinfo yet.
2024-02-06 17:51:24 +01:00
Claire Xen
1b73b5beb7
Merge pull request #4174 from YosysHQ/claire/overwrite
Add API to overwrite existing pass from plugin
2024-02-05 23:49:24 +01:00
hakan-demirli
7dbe288d6f fix: descriptive logs 2024-02-02 02:39:04 +03:00
hakan-demirli
c1d3288654 chore: use similar variable/function names 2024-02-02 01:25:58 +03:00
Catherine
c7bf0e3b8f Add new $check cell to represent assertions with a message. 2024-02-01 20:10:39 +01:00
hakan-demirli
dd5dc06863 fix: save history file on windows 2024-01-31 20:14:32 +03:00
hakan-demirli
820232eaca fix: function naming and locations 2024-01-31 19:50:31 +03:00
hakan-demirli
8c731658c2
Merge branch 'YosysHQ:master' into master 2024-01-31 01:03:59 +03:00
hakan-demirli
039634d973 feat: mkdir with tree 2024-01-31 01:03:01 +03:00
Claire Xenia Wolf
4fa314c0bd Add API to overwrite existing pass from plugin
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2024-01-30 17:51:11 +01:00
N. Engelhardt
027cb31e9d
Merge pull request #4161 from YosysHQ/nak/add_sig_extract_asserts
SigSpec/SigChunk::extract(): assert offset/length are not out of range
2024-01-29 16:11:01 +01:00
Martin Povišer
c035289383 rtlil: Do not create dummy wires when deleting wires in connections 2024-01-29 11:25:54 +01:00
Martin Povišer
d6600fb1d5 rtlil: Fix handling of connections on wire deletion 2024-01-29 11:25:54 +01:00
N. Engelhardt
efe4d6dbdc SigSpec/SigChunk::extract(): assert offset/length are not out of range 2024-01-25 12:28:17 +01:00
Krystine Sherwin
65bb0d3059
Docs: updating to current 'master'
Pulling for #4133 and removing related TODO.
2024-01-22 11:18:07 +13:00