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Code Activity
16026 commits 121 branches 59 tags 69 MiB
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60 commits

Author SHA1 Message Date
Emil J. Tywoniak
bc24947a84 tests: replace CC and gcc with CXX and g++ 2025-09-11 16:50:23 +02:00
Miodrag Milanovic
f4a1906721 support file locations containing spaces 2022-08-08 20:30:50 +02:00
Marcelina Kościelnicka
a3528649c8 memory_dff: Remove now-useless write port handling. 2021-03-08 20:16:29 +01:00
Marcelina Kościelnicka
9a4f420b4b Replace opt_rmdff with opt_dff. 2020-08-07 13:21:03 +02:00
Eddie Hung
0ec7c09756 autotest.sh to define _AUTOTB when test_autotb 2019-06-28 14:56:22 -07:00
Gabriel L. Somlo
6f1c137989 tests: use optional ABCEXTERNAL when specified 
Commits 65924fd1, abc40924, and ebe29b66 hard-code the invocation
of yosys-abc, which fails if ABCEXTERNAL was specified during the
build. Allow tests to utilize an optional, externally specified
abc binary.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-06-27 23:00:13 -04:00
Clifford Wolf
fa5fc3f6af Add defvalue test, minor autotest fixes for .sv files 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-19 12:12:08 +02:00
Eddie Hung
abc40924ed Use ABC to convert from AIGER to Verilog 2019-06-07 11:06:57 -07:00
tux3
88f5977093 SystemVerilog support for implicit named port connections 
This is the `foo foo(.port1, .port2);` SystemVerilog syntax
introduced in IEEE1800-2005.
 2019-06-06 18:07:49 +02:00
Eddie Hung
1e5f072c05 iverilog with simcells.v as well 2019-05-03 14:03:51 -07:00
Clifford Wolf
d38f0c1a96 Fix tests 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-21 11:40:20 +02:00
Eddie Hung
02e8dc7ad2 Merge https://github.com/YosysHQ/yosys into read_aiger 2019-03-19 08:52:31 -07:00
Clifford Wolf
b84febafd7 Hotfix for "make test" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 20:26:54 -08:00
Clifford Wolf
241901461a Add "write_verilog -siminit" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 15:03:03 -08:00
Jim Lawson
171c425cf9 Fix FIRRTL to Verilog process instance subfield assignment. 
Don't emit subfield assignments: bits(x, y, z) <= ... - but instead, add them to the reverse-wire-map where they'll be treated at the end of the module.
Enable tests which were disabled due to incorrect treatment of subfields.
Assume the `$firrtl2verilog` variable contains any additional switches to control verilog generation (i.e. `--no-dedup -X mverilog`)
 2019-02-25 16:18:13 -08:00
Eddie Hung
8e789da74c Revert "Add -B option to autotest.sh to append to backend_opts" 
This reverts commit 281f2aadca.
 2019-02-21 09:22:29 -08:00
Eddie Hung
430a7548bc One more merge conflict 2019-02-17 11:50:55 -08:00
Eddie Hung
17cd5f759f Merge https://github.com/YosysHQ/yosys into dff_init 2019-02-17 11:49:06 -08:00
Eddie Hung
03a533d102 Merge https://github.com/YosysHQ/yosys into read_aiger 2019-02-17 11:44:01 -08:00
Jim Lawson
fc1c9aa11f Update cells supported for verilog to FIRRTL conversion. 
Issue warning messages for missing parameterized modules and attempts to set initial values.
Replace simple "if (cell-type)" with "else if" chain.
Fix FIRRTL shift handling.
Add support for parameterized modules, $shift, $shiftx.
Handle default output file.
Deal with no top module.
Automatically run pmuxtree pass.
Allow EXTRA_FLAGS and SEED parameters to be set in the environment for tests/tools/autotest.mk.
Support FIRRTL regression testing in tests/tools/autotest.sh
Add xfirrtl files to test directories to exclude files from FIRRTL regression tests that are known to fail.
 2019-02-15 11:14:17 -08:00
Eddie Hung
587872236e Support and differentiate between ASCII and binary AIG testing 2019-02-08 12:41:59 -08:00
Eddie Hung
4167b15de5 Merge branch 'dff_init' of https://github.com/eddiehung/yosys into xaig 2019-02-06 14:31:11 -08:00
Eddie Hung
3f87cf86cc Revert most of autotest.sh; for non *.v use Yosys to translate 2019-02-06 14:30:19 -08:00
Eddie Hung
281f2aadca Add -B option to autotest.sh to append to backend_opts 2019-02-06 14:14:55 -08:00
Eddie Hung
3f0bb441f8 Add tests 2019-02-04 16:46:24 -08:00
Udi Finkelstein
106af19b69 Fixed typo (sikp -> skip) 2018-06-05 22:41:27 +03:00
Johnny Sorocil
0295213bec autotest.sh: Change from /bin/bash to /usr/bin/env bash 
This enables running tests on Unix systems which are not shipped with
bash installed in /bin/bash (eg *BSDs and Solaris).
 2018-05-06 15:26:23 +02:00
Clifford Wolf
0c697b9eac Added autotest.sh -I 2016-09-20 09:29:56 +02:00
Clifford Wolf
88a67afa7d Added "test_autotb -seed" (and "autotest.sh -S") 2016-08-06 13:32:29 +02:00
Clifford Wolf
e420412043 Fixed autotest.sh handling of `timescale 2016-07-02 13:32:20 +02:00
Clifford Wolf
1e227caf72 Improvements and fixes in autotest.sh script and test_autotb 2016-05-20 16:58:02 +02:00
Kaj Tuomi
f6221ade95 Fix for Modelsim transcript line warp issue #164 2016-05-19 11:34:38 +03:00
Sergey Kvachonok
e14055edf0 Optionally use ${CC} when compiling test utils. 
Default to gcc when not set.
 2016-03-25 10:35:42 +03:00
Larry Doolittle
6c00704a5e Another block of spelling fixes 
Smaller this time
 2015-08-14 23:27:05 +02:00
Clifford Wolf
d58c3eca3a Some test related fixes 
(incl. removal of three bad test cases)
 2015-02-12 17:45:44 +01:00
Clifford Wolf
7815f81c32 Added "synth" command 2014-09-14 16:09:06 +02:00
Clifford Wolf
76f8128123 Fixed autotest for non-basename arguments 2014-09-06 12:10:57 +02:00
Clifford Wolf
88db09255b Added autotest -e (do not use -noexpr on write_verilog) 2014-08-30 18:34:07 +02:00
Clifford Wolf
358bf70a21 Added "wreduce" to some of the standard test benches 2014-08-03 20:22:33 +02:00
Clifford Wolf
03ef9a75c6 Added "test_autotb -n <num_iter>" option 2014-08-01 03:55:51 +02:00
Clifford Wolf
7d98645fe8 Added "make -j{N}" support to "make test" 2014-07-30 19:23:26 +02:00
Clifford Wolf
e6df25bf74 Renamed "write_autotest" to "test_autotb" and moved to passes/tests/ 2014-07-29 21:12:50 +02:00
Clifford Wolf
1241a9fd50 Added "opt_const -fine" and "opt_reduce -fine" 2014-07-21 16:34:16 +02:00
Clifford Wolf
ec3a798194 Also simulate unmapped memories in "make test" 2014-07-17 16:53:52 +02:00
Clifford Wolf
964a67ac41 Added note to "make test": use git checkout of iverilog 2014-07-16 10:03:07 +02:00
Clifford Wolf
a67cd2d4a2 Progress in Verific bindings 2014-03-17 01:56:00 +01:00
Clifford Wolf
0ac915a757 Progress in Verific bindings 2014-03-14 11:46:13 +01:00
Clifford Wolf
30379ea20d Added frontend (-f) option to autotest.sh 2014-02-15 15:40:17 +01:00
Clifford Wolf
7664f5d92b Updated ABC and some related changes 2014-02-13 08:07:08 +01:00
Clifford Wolf
9ce7b0fc3b Disabled "abc -dff" in "make test" for now (waiting for scorr bugfix in ABC) 2014-02-12 13:11:58 +01:00