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7746 commits 94 branches 52 tags 62 MiB
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9 commits

Author SHA1 Message Date
Miodrag Milanovic 9bd9db56c8 Unify verilog style 2019-10-18 12:50:24 +02:00
Miodrag Milanovic 12383f37b2 Common memory test now shared 2019-10-18 12:33:35 +02:00
Miodrag Milanovic 477702b8c9 Remove not needed tests 2019-10-18 12:20:35 +02:00
Miodrag Milanovic 5603595e5c Share common tests 2019-10-18 12:19:59 +02:00
Miodrag Milanovic ab98f2dccf fix yosys path 2019-10-18 11:18:53 +02:00
Miodrag Milanovic 56f9482675 Fix path to yosys 2019-10-18 11:12:03 +02:00
Miodrag Milanovic c2ec7ca703 Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
Eddie Hung ab7c431905 Add simcells.v, simlib.v, and some output 2019-06-27 11:13:49 -07:00
David Shah 71b046d639 tests: Check that Icarus can parse arch sim models 
Signed-off-by: David Shah <dave@ds0.me>
 2019-06-26 18:46:22 +01:00