64 commits

Author	SHA1	Message	Date
Clifford Wolf	207736b4ee	Import more std:: stuff into Yosys namespace	2015-10-25 19:30:49 +01:00
Clifford Wolf	6af8076967	improvement in "stat"	2015-10-24 21:56:53 +02:00
Clifford Wolf	6c84341f22	Fixed trailing whitespaces	2015-07-02 11:14:30 +02:00
Clifford Wolf	c6ae9ebb79	Fixed "stat" handling of blackbox modules	2015-02-14 22:36:34 +01:00
Clifford Wolf	4569a747f8	Renamed SIZE() to GetSize() because of name collision on Win32	2014-10-10 17:07:24 +02:00
Clifford Wolf	9dea161321	sort cell types in "stat" output by name	2014-10-03 19:21:04 +02:00
Clifford Wolf	f9a307a50b	namespace Yosys	2014-09-27 16:17:53 +02:00
Clifford Wolf	8927aa6148	Removed $bu0 cell type	2014-09-04 02:07:52 +02:00
Clifford Wolf	fff12c719f	Added "stat -width"	2014-08-22 17:20:28 +02:00
Clifford Wolf	10e5791c5e	Refactoring: Renamed RTLIL::Design::modules to modules_	2014-07-27 11:18:30 +02:00
Clifford Wolf	4c4b602156	Refactoring: Renamed RTLIL::Module::cells to cells_	2014-07-27 01:51:45 +02:00
Clifford Wolf	f9946232ad	Refactoring: Renamed RTLIL::Module::wires to wires_	2014-07-27 01:49:51 +02:00
Clifford Wolf	3d95047ce2	Bugfixes in new "stat" command	2013-11-25 21:08:34 +01:00
Clifford Wolf	4c7d6e63ec	Added "stat" command	2013-11-25 20:43:57 +01:00