mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-10 16:12:04 +00:00
Code Activity
9098 commits 121 branches 59 tags 48 MiB
Commit graph

2 commits

Author SHA1 Message Date
Marcin Kościelnicki
30854b9c7f xilinx: Add block RAM mapping for Virtex 2* and Spartan 3*. 2020-02-07 01:00:29 +01:00
Marcin Kościelnicki
ce250b341c synth_xilinx: Initial Spartan 6 block RAM inference support. 2019-07-11 14:45:48 +02:00
Renamed from techlibs/xilinx/brams_map.v (Browse further)