Emil J. Tywoniak
4cbc92f50f
quicklogic: add fracturable full-block dspv1 to keep vendor simulation model unchanged
2025-03-11 10:35:31 +01:00
Emil J. Tywoniak
651d5728d0
ql_dsp_macc: dspv2
2025-03-11 10:35:30 +01:00
Emil J. Tywoniak
47b270a03e
synth_quicklogic: enable dspv2 tests, fix -dspv2
2025-03-11 10:35:30 +01:00
Emil J. Tywoniak
c451d8ebb9
synth_quicklogic: add -dspv2 to opt into v2 DSP blocks
2025-03-11 10:35:30 +01:00
Martin Povišer
531374bec1
qlf_k6n10f: New ql_dsp pass, move to DSPV2
2025-03-11 10:35:01 +01:00
N. Engelhardt
303a386ecc
create duplicate IOFFs if multiple output ports are connected to the same register
2025-01-31 11:28:57 +01:00
N. Engelhardt
1cf8e7c7db
add ioff inference for qlf_k6n10f
2025-01-24 21:17:15 +01:00
Martin Povišer
9018d06a33
quicklogic: Avoid carry chains in division mapping
...
The default mapping rules for division-like operations (div/divfloor/
mod/modfloor) invoke subtractions which can get mapped to carry chains
in FPGA flows. Optimizations across carry chains are weak, so in
practice this ends up too costly compared to implementing the division
purely in soft logic.
For this reason arrange for `techmap.v` ignoring division operations
under `-D NODIV`, and use this mode in `synth_quicklogic` to avoid carry
chains for divisions.
2024-09-19 12:18:47 +02:00
Martin Povišer
dad85b5178
synth_quicklogic: Fix missing FF mapping
2023-12-04 15:52:03 +01:00
Martin Povišer
e19833f8c7
synth_quiclogic: Fix conditioning of bram passes
2023-12-04 15:52:02 +01:00
Martin Povišer
4bb4fd358e
ql_k6n10f: Remove support for parameter-configured DSP variety
2023-12-04 15:52:02 +01:00
N. Engelhardt
b80b1ab8b6
merge brams_final_map.v into brams_map.v
2023-12-04 15:52:02 +01:00
N. Engelhardt
20d864bbde
add dsp inference
2023-12-04 15:52:02 +01:00
N. Engelhardt
6682693888
change ql-bram-types pass to use mode parameter; clean up primitive libraries
2023-12-04 15:52:02 +01:00
N. Engelhardt
48c1fdc33d
add qlf_k6n10f architecture + bram inference
...
(Copied from QuickLogic Yosys plugin repo)
2023-12-04 15:52:02 +01:00
N. Engelhardt
98769010af
synth_quicklogic: rearrange files to prepare for adding more architectures
2023-12-04 15:52:02 +01:00
KrystalDelusion
9465b2af95
Fitting help messages to 80 character width
...
Uses the regex below to search (using vscode):
^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);
Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
2022-08-24 10:40:57 +12:00
Xing GUO
0520e99968
Fix the help message of synth_quicklogic.
2022-01-31 02:23:59 +08:00
Lofty
dce037a62c
quicklogic: ABC9 synthesis
2021-04-17 20:54:58 +02:00
Lofty
f4298b057a
quicklogic: PolarPro 3 support
...
Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
2021-03-18 13:28:16 +01:00
