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Code Activity
9261 commits 122 branches 59 tags 71 MiB
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160 commits

Author SHA1 Message Date
Clifford Wolf
cad40fc874 Fixed bug in memory_share for memory ports with different ABITS 2016-08-22 14:26:33 +02:00
Clifford Wolf
15ef608453 Added memory_memx pass, "memory -memx", and "prep -memx" 2016-08-19 19:48:26 +02:00
Clifford Wolf
f6629b9c29 Optimize memory address port width in wreduce and memory_collect, not verilog front-end 2016-08-19 18:38:25 +02:00
Clifford Wolf
ffcdc53a18 Don't sign-extend memory bram initialization data 2016-05-15 00:05:30 +02:00
Clifford Wolf
0bc95f1e04 Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
Clifford Wolf
1761d08dd2 Bugfix and improvements in memory_share 2016-04-21 14:22:58 +02:00
Clifford Wolf
ec93680bd5 Renamed opt_share to opt_merge 2016-03-31 08:52:49 +02:00
Clifford Wolf
bcc873b805 Fixed some visual studio warnings 2016-02-13 17:31:24 +01:00
Clifford Wolf
ddf3e2dc65 Bugfix in memory_dff 2015-10-31 22:01:41 +01:00
Clifford Wolf
207736b4ee Import more std:: stuff into Yosys namespace 2015-10-25 19:30:49 +01:00
Clifford Wolf
4864736167 Bugfix in bram read-enable code 2015-09-25 14:22:33 +02:00
Clifford Wolf
924d9d6e86 Added read-enable to memory model 2015-09-25 12:23:11 +02:00
Clifford Wolf
3501f8e364 Fixed memory_bram for ROMs in BRAMs with write-enable inputs 2015-09-24 11:37:15 +02:00
Larry Doolittle
022f570563 Keep gcc from complaining about uninitialized variables 2015-08-14 23:26:49 +02:00
Clifford Wolf
84bf862f7c Spell check (by Larry Doolittle) 2015-08-14 10:56:05 +02:00
Clifford Wolf
883e09d8ed Use MEMID as name for $mem cell 2015-08-09 13:35:44 +02:00
Clifford Wolf
8d6d5c30d9 Added WORDS parameter to $meminit 2015-07-31 10:40:09 +02:00
Clifford Wolf
d2ff5d9994 Do not collect disabled $memwr cells 2015-07-06 13:28:00 +02:00
Clifford Wolf
6c84341f22 Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
Clifford Wolf
66910e15b2 Modernized memory_dff (and fixed a bug) 2015-06-14 16:15:51 +02:00
Clifford Wolf
f6eca509bb Added "memory -nordff" 2015-06-14 15:47:11 +02:00
Clifford Wolf
b57cb4a7fe Merge clock inverters in memory_dff 2015-06-09 07:25:12 +02:00
Clifford Wolf
7462618591 Fixed memory_unpack for initialized memories 2015-04-29 19:55:32 +02:00
Clifford Wolf
11f77205f5 Fixed memory_share for unconditional write with part select to memory 2015-04-22 06:40:23 +02:00
Clifford Wolf
7319951145 Added memory_bram "make_outreg" feature 2015-04-09 16:08:54 +02:00
Clifford Wolf
21a1cc1b60 Added support for "file names with blanks" 2015-04-08 12:14:34 +02:00
Clifford Wolf
169d1c4711 Added support for initialized brams 2015-04-06 17:06:15 +02:00
Clifford Wolf
a1c62b79d5 Avoid parameter values with size 0 ($mem cells) 2015-04-05 18:04:19 +02:00
Clifford Wolf
4e6ca7760f Replaced ezDefaultSAT with ezSatPtr 2015-02-21 12:15:41 +01:00
Clifford Wolf
e9368a1d7e Various fixes for memories with offsets 2015-02-14 14:21:15 +01:00
Clifford Wolf
dcf2e24240 Added $meminit support to "memory" command 2015-02-14 12:55:03 +01:00
Clifford Wolf
a038787c9b Added onehot attribute 2015-02-04 18:52:54 +01:00
Ruben Undheim
49649d6ef0 Fixed typos found by lintian 2015-02-01 21:49:55 +01:00
Clifford Wolf
8d295730e5 Refactoring of memory_bram and xilinx brams 2015-01-18 19:05:29 +01:00
Clifford Wolf
b26590f8ab memory_bram hotfix for memories with width 1 2015-01-06 23:59:53 +01:00
Clifford Wolf
da72050107 removed old debug code 2015-01-06 16:08:04 +01:00
Clifford Wolf
9474928672 Towards Xilinx bram support 2015-01-06 15:26:33 +01:00
Clifford Wolf
081e1a49f8 Towards Xilinx bram support 2015-01-06 14:26:51 +01:00
Clifford Wolf
9ea2511fe8 Towards Xilinx bram support 2015-01-05 13:59:04 +01:00
Clifford Wolf
8898897f7b Towards Xilinx bram support 2015-01-04 14:23:30 +01:00
Clifford Wolf
daae35319b Added memory_bram "shuffle_enable" feature 2015-01-04 13:14:30 +01:00
Clifford Wolf
5d631f0ea7 Removed left over debug code from memory_bram 2015-01-04 11:46:04 +01:00
Clifford Wolf
45918b8315 Added "memory -bram" 2015-01-03 17:40:20 +01:00
Clifford Wolf
a7fe87f888 Added memory_bram 'or_next_if_better' feature 2015-01-03 17:34:05 +01:00
Clifford Wolf
fd2c224c04 memory_bram transp support 2015-01-03 12:41:46 +01:00
Clifford Wolf
a7e43ae3d9 Progress in memory_bram 2015-01-03 10:57:01 +01:00
Clifford Wolf
90f4017703 Added proper clkpol support to memory_bram 2015-01-02 22:57:08 +01:00
Clifford Wolf
bbf89c4dc6 Progress in memory_bram 2015-01-02 13:59:47 +01:00
Clifford Wolf
36c20f2ede Progress in memory_bram 2015-01-02 00:07:44 +01:00
Clifford Wolf
f29f4e7c83 Progress in memory_bram 2015-01-01 15:32:37 +01:00