Emil J. Tywoniak
8c4ab49955
Revert "memory: add -bram-register"
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This reverts commit 2bc6ea7f37
2026-05-22 18:40:01 +02:00
Emil J. Tywoniak
c64be26334
Revert "memory_bram: add -register"
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This reverts commit b4b5093a14
2026-05-22 18:40:01 +02:00
Emil J. Tywoniak
67de0c8c9e
memory: add -bram-register
2026-05-22 18:39:05 +02:00
Emil J. Tywoniak
88aa5f190b
memory_bram: add -register
2026-05-22 18:39:05 +02:00
Miodrag Milanović
36eceed720
Merge pull request #5862 from codexplorer-fish/cleaning-up-log-id
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Cleaning up log_id()
2026-05-15 11:07:43 +00:00
Leo Moser
fb83719745
memlib: fix documentation for PORT_<name>_CLK_POL
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Signed-off-by: Leo Moser <leomoser99@gmail.com>
2026-05-09 10:28:07 +02:00
Codexplorer
e41b969da2
Refactored uses of log_id()
2026-05-08 20:59:24 -07:00
Krystine Sherwin
094481739f
memory_libmap: Add -force-params
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Reduce complexity for adi brams by unconditionally providing the WIDTH and ABITS parameters.
2026-02-20 10:57:00 +00:00
Robert O'Callahan
1e5f920dbd
Remove .c_str() from parameters to log_debug()
2025-09-23 19:10:33 +12:00
Robert O'Callahan
a7c46f7b4a
Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix()
2025-09-16 23:02:16 +00:00
Robert O'Callahan
23f196a3b8
Update passes/memory to avoid bits()
2025-09-16 03:17:23 +00:00
Jannis Harder
dd9627ed05
Merge pull request #5336 from rocallahan/remove-log-cstr
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Remove `.c_str()` calls from `log()`/`log_error()`
2025-09-12 14:09:48 +02:00
Krystine Sherwin
f102b25914
Reapply "Merge pull request #5301 from KrystalDelusion/krys/re_5280"
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This reverts commit 88eb83a0c3
2025-09-12 10:41:01 +02:00
Robert O'Callahan
e0ae7b7af4
Remove .c_str() calls from log()/log_error()
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There are some leftovers, but this is an easy regex-based approach that removes most of them.
2025-09-11 20:59:37 +00:00
Jannis Harder
61a00b9131
memory_libmap: Fix use of uninitialized value for async read ports
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The code in memory_libmap expects `clk_en` to be initialized for all
`PortVariant`s but the parsing in memlib.cc didn't initialize it for
variants of kind `PortKind::Ar` (async read ports).
While this fixes the immediate CI failure, it would be best to refactor
the code so it becomes obvious if something isn't initialized.
2025-09-09 13:32:46 +02:00
Robert O'Callahan
c7df6954b9
Remove .c_str() from stringf parameters
2025-09-01 23:34:42 +00:00
Miodrag Milanovic
88eb83a0c3
Revert "Merge pull request #5301 from KrystalDelusion/krys/re_5280"
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This reverts commit c9a602e88251eaaffe09
2025-08-28 11:58:02 +02:00
Krystine Sherwin
3ca2b7951f
memlib: Fix ubsan
2025-08-19 17:05:51 +12:00
Emil J. Tywoniak
c8e0ac0c61
ast, read_verilog: ownership in AST, use C++ styles for parser and lexer
2025-08-11 13:34:10 +02:00
Fred Tombs
b64484795d
Fix typos in memlib
2025-07-29 15:27:59 -04:00
Emil J. Tywoniak
872a197e94
memory_libmap: fix MapWorker memory allocation
2025-04-14 12:41:14 +02:00
Emil J. Tywoniak
55b60dca95
memory_libmap: update indices on design modification
2025-02-11 13:32:34 +01:00
Emil J. Tywoniak
785bd44da7
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
Martin Povišer
158fbf881e
memory_map: Explain -iattr better
2024-03-06 15:15:37 +01:00
Martin Povišer
030d639201
opt_mem, memory_*: Refuse to operate in presence of processes
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Processes can contain `MemWriteAction` entries which are invisible to
most passes operating on memories but which will be lowered to write
ports later on by `proc_memwr`. For that reason we can get corrupted
RTLIL if we sequence the memory passes before `proc`. Address that by
making the affected memory passes ignore modules with processes.
2024-02-23 12:27:53 +01:00
Martin Povišer
975517b022
memory_memx: Fix log header
2024-02-23 12:27:10 +01:00
uis
5902b2826d
Fix printf formats
2024-01-15 12:07:54 +01:00
N. Engelhardt
080da693d1
memory_libmap: update search order for attributes
2023-10-24 13:55:45 +02:00
N. Engelhardt
1b6d1e9419
memory_libmap: look for ram_style attributes on surrounding signals
2023-10-19 19:23:35 +02:00
Martin Povišer
c6566b660f
memlib.md: Fix typo
2023-09-04 17:38:35 +02:00
Martin Povišer
3de84b959f
memory_libmap: Tweak whitespace
2023-09-04 17:38:35 +02:00
N. Engelhardt
57de249881
memory_libmap: print additional debug messages when no valid mapping is found
2023-07-06 18:54:32 +02:00
N. Engelhardt
a6be7b4751
memory_libmap: add debug messages for some reasons for rejecting mappings
2023-06-29 14:08:31 +02:00
N. Engelhardt
7542146fc5
memory_libmap: print message about attributes forcing ram kind
2023-06-28 17:48:20 +02:00
KrystalDelusion
9465b2af95
Fitting help messages to 80 character width
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Uses the regex below to search (using vscode):
^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);
Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
2022-08-24 10:40:57 +12:00
Jannis Harder
a2f9ebe43a
memory_map: Add -formal option
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This maps memories for a global clock based formal verification flow.
This implies -keepdc, uses $ff cells for ROMs and sets hdlname
attributes.
2022-08-16 13:37:30 +02:00
Jannis Harder
a6b440b5c9
memory_map: avoid undriven unused FF inputs for -keepdc
2022-06-28 19:05:35 +02:00
Jannis Harder
d78d807a7f
memory_map: -keepdc option for formal
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Use it when invoking memory_map -rom-only from write_{smt2,btor}.
2022-06-27 15:47:55 +02:00
Marcelina Kościelnicka
ab3a9325c3
memory_map: Add -rom-only option.
2022-06-17 16:56:11 +02:00
Marcelina Kościelnicka
01daa077a2
memory_map: Use const drivers instead of FFs for ROMs.
2022-06-17 15:17:14 +02:00
Marcelina Kościelnicka
d69091806a
memory_libmap: Fix wrprio handling.
2022-06-17 02:09:37 +02:00
Marcelina Kościelnicka
25a4cd7020
memory_libmap: Fix params emitted for unused ports for consistency.
2022-06-16 08:14:08 +02:00
Marcelina Kościelnicka
71dfbf33b2
Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.
2022-06-02 23:16:12 +02:00
Marcelina Kościelnicka
3a0aa9c663
memory_dff: Add support for no_rw_check attribute.
2022-06-02 12:49:34 +02:00
Marcelina Kościelnicka
606f1637ae
Add memory_bmux2rom pass.
2022-05-18 22:48:55 +02:00
Marcelina Kościelnicka
7c5dba8b77
Add memory_libmap pass.
2022-05-18 17:32:56 +02:00
imhcyx
71166eeecf
memory_share: fix wrong argidx in extra_args
2022-05-05 16:58:39 +08:00
Marcelina Kościelnicka
25ff83f0b5
memory_share: Fix up mismatched address widths.
2022-04-15 22:01:00 +02:00
Marcelina Kościelnicka
1759c80a3f
memory_bram: Make use of new mem emulation functions to map more RAMs.
2022-01-27 19:31:27 +01:00
Marcelina Kościelnicka
f84c9d8e17
memory_share: Fix SAT-based sharing for wide ports.
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Fixes #3117 .
2021-12-20 18:40:14 +01:00
