Emil J. Tywoniak
09f55abf1a
flatten: disable signorm
2026-05-22 18:40:01 +02:00
Emil J. Tywoniak
81b99d83f5
hierarchy: tolerance for apparent recursive instances in techmap files
2026-05-22 18:39:42 +02:00
Emil J. Tywoniak
faa1a1065c
flatten: redo signormalization to work around fanout issue
2026-05-22 18:37:58 +02:00
Emil J. Tywoniak
dad6277a25
flatten: skip $input_port cells in template module
2026-05-22 18:37:58 +02:00
Miodrag Milanovic
75dcbe03c6
Convert RTLIL::unescape_id of IdString to unescape()
2026-05-16 19:49:45 +02:00
Miodrag Milanovic
8bbc3c359c
Remove id2cstr uses in our code base
2026-05-16 19:49:45 +02:00
Codexplorer
e41b969da2
Refactored uses of log_id()
2026-05-08 20:59:24 -07:00
Krystine Sherwin
10a55119a9
hierarchy.cc: Tidying
2025-10-15 09:42:47 +13:00
Krystine Sherwin
5d2d544109
hierarchy.cc: Don't segfault
2025-10-15 09:38:43 +13:00
Krystine Sherwin
7bb0a1913e
hierarchy.cc: Raise error on positional interface
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Add test to check that it does error.
2025-10-15 09:10:33 +13:00
Jannis Harder
ce5d04a42f
hierarchy: Suggest more specific command to skip unsupported SVA
2025-09-26 18:41:26 +02:00
Jannis Harder
83dd99efb7
verific: New -sva-continue-on-error import option
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This option allows you to process a design that includes unsupported
SVA. Unsupported SVA gets imported as formal cells using 'x inputs and
with the `unsupported_sva` attribute set. This allows you to get a
complete list of defined properties or to check only a supported subset
of properties. To ensure no properties are unintentionally skipped for
actual verification, even in cases where `-sva-continue-on-error` is
used by default to read and inspect a design, `hierarchy -simcheck` and
`hierarchy -smtcheck` (run by SBY) now ensure that no `unsupported_sva`
property cells remain in the design.
2025-09-24 18:58:54 +02:00
Robert O'Callahan
a7c46f7b4a
Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix()
2025-09-16 23:02:16 +00:00
Robert O'Callahan
5ac6858f26
Remove .c_str() from log_cmd_error() and log_file_error() parameters
2025-09-16 22:59:08 +00:00
Robert O'Callahan
7f247fb125
Update passes/hierarchy to avoid bits()
2025-09-16 03:17:23 +00:00
Robert O'Callahan
e0ae7b7af4
Remove .c_str() calls from log()/log_error()
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There are some leftovers, but this is an easy regex-based approach that removes most of them.
2025-09-11 20:59:37 +00:00
Robert O'Callahan
c7df6954b9
Remove .c_str() from stringf parameters
2025-09-01 23:34:42 +00:00
Krystine Sherwin
3959d19291
Reapply "Add groups to command reference"
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This reverts commit 81f87ce6ed .
2025-08-06 13:52:12 +12:00
N. Engelhardt
81f87ce6ed
Revert "Add groups to command reference"
2025-07-23 14:41:49 +00:00
Krystine Sherwin
3eb7b35c29
flatten: Move to hierarchy folder
2025-07-21 10:36:19 +12:00
N. Engelhardt
f1dea78603
don't warn for every blackbox from verific
2025-06-06 15:37:42 +02:00
Krystine Sherwin
44545653ef
hierarchy: Ignore width mismatch from verific
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But only if it's also a blackbox module with parameters (i.e. it *could* be parametrizable width).
2025-04-11 04:12:34 +12:00
Krystine Sherwin
cd3b914132
Reinstate #4768
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Revert the reversion so that we can fix the bugs that the PR missed.
2025-04-08 11:58:05 +12:00
Miodrag Milanović
d49364d96f
Revert "Refactor full_selection"
2025-04-07 12:11:55 +02:00
Krystine Sherwin
dac2bb7d4d
Use selection helpers
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Catch more uses of selection constructor without assigning a design.
2025-03-14 14:08:13 +13:00
Larry Doolittle
27be9a6b77
keep_hierarchy.cc: use strictly correct syntax for printf of uint64_t values
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Removes two warnings from the compile, at least on amd64 arch
2025-01-10 14:03:09 -08:00
Martin Povišer
109d97bb40
Merge pull request #4706 from povik/keep_hierarchy-adjustalgo
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Adjust `keep_hierarchy` behavior
2024-12-03 12:18:28 +01:00
Martin Povišer
6ad4918121
Account for pre-existing keep_hierarchy in cost sum
2024-12-03 11:11:59 +01:00
Martin Povišer
c33f7b92f7
Fix typo
2024-12-03 11:11:02 +01:00
N. Engelhardt
96c526d1ba
Print a note about finding attribute (* top *) in hierarchy
2024-11-13 10:21:44 +01:00
Martin Povišer
c8fffce2b5
keep_hierarchy: Update messages
2024-11-05 09:03:01 +01:00
Martin Povišer
cf79630be0
keep_hierarchy: Require size information on blackboxes
2024-11-05 09:02:36 +01:00
Martin Povišer
2425352551
keep_hierarchy: Redo hierarchy traversal for -min_cost
2024-11-05 09:02:36 +01:00
Emil J. Tywoniak
785bd44da7
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
Emil J. Tywoniak
4b29f64142
cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter
2024-07-29 10:26:02 +02:00
N. Engelhardt
b87327d1b9
fix hierarchy -generate mode handling of cells
2024-04-12 13:38:33 +02:00
Jannis Harder
0470cbb00d
hierarchy: Without a known top module, derive all deferred modules
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This fixes hierarchy when used with cell libraries that were loaded with
-defer and also makes more of the hierarchy visible to the auto-top
heuristic.
2024-02-06 10:31:40 +01:00
Catherine
c7bf0e3b8f
Add new $check cell to represent assertions with a message.
2024-02-01 20:10:39 +01:00
Catherine
3d9e44d182
hierarchy: keep display statements, like formal assertions.
2024-01-22 10:09:22 +00:00
Claire Xenia Wolf
a9072dc23c
Small bugfix in uniquify pass
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2022-12-21 10:41:48 +01:00
Miodrag Milanovic
b0be19c126
Support importing verilog configurations using Verific
2022-11-25 13:02:11 +01:00
Miodrag Milanovic
4bc1e1d1f1
Makes sure to set initial_top when change, fixes #3462
2022-08-26 17:12:56 +02:00
KrystalDelusion
9465b2af95
Fitting help messages to 80 character width
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Uses the regex below to search (using vscode):
^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);
Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
2022-08-24 10:40:57 +12:00
Jannis Harder
c0063288d6
Add the $anyinit cell and the formalff pass
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These can be used to protect undefined flip-flop initialization values
from optimizations that are not sound for formal verification and can
help mapping all solver-provided values in witness traces for flows that
use different backends simultaneously.
2022-08-16 13:37:30 +02:00
c16c028831
add hierarchy -smtcheck
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like -simcheck, but allow smtlib2_module modules.
2022-06-22 20:53:10 -07:00
Miodrag Milanovic
977002b1d2
Reorder steps in -auto-top to fix synth command, fixes #3261
2022-04-05 14:02:37 +02:00
Zachary Snow
e833c6a418
verilog: use derived module info to elaborate cell connections
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- Attempt to lookup a derived module if it potentially contains a port
connection with elaboration ambiguities
- Mark the cell if module has not yet been derived
- This can be extended to implement automatic hierarchical port
connections in a future change
2021-10-25 18:25:50 -07:00
Rupert Swarbrick
bd16d01c0e
Split out logic for reprocessing an AstModule
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This will enable other features to use same core logic for replacing an
existing AstModule with a newly elaborated version.
2021-10-25 18:25:50 -07:00
Rupert Swarbrick
7a25246a7e
Use new read_id_num helper function elsewhere in hierarchy.cc
2021-07-20 10:13:15 -04:00
Rupert Swarbrick
8fd6b45a3c
Extract connection checking logic from expand_module in hierarchy.cc
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No functional change, but pulls more logic out of the expand_module
function.
2021-07-20 10:13:15 -04:00