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8043 commits 123 branches 59 tags 44 MiB
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Author SHA1 Message Date
Clifford Wolf
1b49380f6b Improve BTOR2 handling of undriven wires 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-26 17:42:00 +02:00
David Shah
0dd850e655 abc9: Add wire delays to synth_ice40 
Signed-off-by: David Shah <dave@ds0.me>
 2019-06-26 11:39:44 +01:00
Clifford Wolf
f6053b8810 Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-26 11:09:43 +02:00
Clifford Wolf
8e9ef891fe Do not clean up buffer cells with "keep" attribute, closes #1128 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-26 11:01:03 +02:00
Clifford Wolf
b3c36b4448 Escape scope names starting with dollar sign in smtio.py 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-26 10:58:39 +02:00
whitequark
3d4102cfa4 Add more ECP5 Diamond flip-flops. 
This includes all I/O registers, and a few more regular FFs where it
was convenient.
 2019-06-26 01:57:29 +00:00
Eddie Hung
1a4092d26a Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-25 10:39:08 -07:00
Eddie Hung
5db96b8aec Missing muxpack.o in Makefile 2019-06-25 10:38:42 -07:00
Eddie Hung
fac3528133 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-25 09:36:12 -07:00
Eddie Hung
480a04cb3c Realistic delays for RAM32X1D too 2019-06-25 09:34:28 -07:00
Eddie Hung
6095357390 Add RAM32X1D box info 2019-06-25 09:34:19 -07:00
Eddie Hung
6f36ec8ecf Merge remote-tracking branch 'origin/master' into xaig 2019-06-25 09:33:11 -07:00
Eddie Hung
4238feed81 This optimisation doesn't seem to work... 2019-06-25 09:21:46 -07:00
Eddie Hung
ab6e8ce0f0 Add testcase from #335, fixed by #1130 2019-06-25 08:43:58 -07:00
Clifford Wolf
add2d415fc
Merge pull request #1130 from YosysHQ/eddie/fix710 
memory_dff: walk through more than one mux for computing read enable
 2019-06-25 17:34:44 +02:00
Eddie Hung
42720ef6fe Fix spacing 2019-06-25 08:33:17 -07:00
Eddie Hung
c4e4902098 Move only one consumer check outside of while loop 2019-06-25 08:29:55 -07:00
Eddie Hung
58629dc2ce
Merge pull request #1129 from YosysHQ/eddie/ram32x1d 
Add RAM32X1D support
 2019-06-25 08:22:57 -07:00
Clifford Wolf
e754bce047
Merge pull request #1075 from YosysHQ/eddie/muxpack 
Add new "muxpack" command for packing chains of $mux cells
 2019-06-25 17:21:59 +02:00
Eddie Hung
d2fed0a7f1 nullptr check 2019-06-25 06:06:32 -07:00
Eddie Hung
5b89553a1f nullptr check 2019-06-24 23:37:01 -07:00
Eddie Hung
158325956e Realistic delays for RAM32X1D too 2019-06-24 23:05:28 -07:00
Eddie Hung
3825068a75 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-24 23:04:25 -07:00
Eddie Hung
2f770b7400 Use LUT delays for dist RAM delays 2019-06-24 23:02:53 -07:00
Eddie Hung
e1ba25d79f Add RAM32X1D box info 2019-06-24 22:54:35 -07:00
Eddie Hung
1564eb8b54 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-24 22:48:49 -07:00
Eddie Hung
a19226c174 Fix for abc_scc_break is bus 2019-06-24 22:16:56 -07:00
Eddie Hung
5605002d8a More meaningful error message 2019-06-24 22:12:55 -07:00
Eddie Hung
4fadb471a3 Re-enable dist RAM boxes for ECP5 2019-06-24 22:12:50 -07:00
Eddie Hung
a4a7e63d84 Revert "Re-enable dist RAM boxes for ECP5" 
This reverts commit ca0225fcfa.
 2019-06-24 22:10:28 -07:00
Eddie Hung
babadf5938 Do not use log_id as it strips \\, also fix scc for |wire| > 1 2019-06-24 22:04:22 -07:00
Eddie Hung
ca0225fcfa Re-enable dist RAM boxes for ECP5 2019-06-24 21:55:54 -07:00
Eddie Hung
152e682bd5 Add Xilinx dist RAM as comb boxes 2019-06-24 21:54:01 -07:00
Eddie Hung
49a762ba46 Fix abc9's scc breaker, also break on abc_scc_break attr 2019-06-24 21:53:18 -07:00
Eddie Hung
9dca024a30 Add tests/various/abc9.{v,ys} with SCC test 2019-06-24 21:52:53 -07:00
Eddie Hung
cec2292b0b Merge remote-tracking branch 'origin/master' into xaig 2019-06-24 20:01:43 -07:00
Eddie Hung
b7deaceadd Walk through as many muxes as exist for rd_en 2019-06-24 18:33:06 -07:00
Eddie Hung
a701a2accf Add test 2019-06-24 18:32:58 -07:00
Eddie Hung
f1675b88f6 Merge remote-tracking branch 'origin/eddie/ram32x1d' into xc7mux 2019-06-24 16:39:18 -07:00
Eddie Hung
efd04880db Add RAM32X1D support 2019-06-24 16:16:50 -07:00
Eddie Hung
c3df895bf4 Reduce MuxFx resources in mux techmapping 2019-06-24 15:16:44 -07:00
Eddie Hung
db6a0b72b2 Reduce number of decomposed muxes during techmap 2019-06-24 14:28:56 -07:00
Eddie Hung
2e7992efff Revert "Fix techmapping muxes some more" 
This reverts commit 0aae3b4f43.
 2019-06-24 14:15:31 -07:00
Eddie Hung
7fbfcf20d1 Move comment 2019-06-24 14:15:00 -07:00
Eddie Hung
0aae3b4f43 Fix techmapping muxes some more 2019-06-24 12:50:48 -07:00
Eddie Hung
2b4501503d Fix mux techmapping 2019-06-24 12:18:17 -07:00
Eddie Hung
aa1eeda567 Modify costs for muxcover 2019-06-24 11:51:55 -07:00
Eddie Hung
c2387394e3 Revert Makefile 2019-06-24 11:50:37 -07:00
Eddie Hung
36e6da5396 Change synth_xilinx's -nomux to -minmuxf <int> 2019-06-24 10:04:01 -07:00
Clifford Wolf
e32cef4063
Merge pull request #1124 from mmicko/json_ports 
Add upto and offset to JSON ports
 2019-06-24 08:52:12 +02:00