mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-05-12 10:14:43 +00:00
Code Activity
508 commits 118 branches 54 tags 57 MiB
Commit graph

3 commits

Author SHA1 Message Date
Clifford Wolf
e5b974fa2a Cleanups and bugfixes in response to new internal cell checker 2013-11-11 00:39:45 +01:00
Clifford Wolf
5998c101a4 Added $sr, $dffsr and $dlatch cell types 2013-10-18 11:56:16 +02:00
Clifford Wolf
288ba9618a Moved common techlib files to techlibs/common 2013-09-15 11:52:57 +02:00
Renamed from techlibs/simlib.v (Browse further)