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									 Clifford Wolf | 482d9208aa | Added read_verilog -sv options, added support for bit, logic, allways_ff, always_comb, and always_latch | 2014-06-12 11:54:20 +02:00 |  | 
				
					
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									 Clifford Wolf | 9a6cd64fc2 | Now we are in Yoys 0.3.0+ development | 2014-06-08 15:31:27 +02:00 |  | 
				
					
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									 Clifford Wolf | ca125bf41b | Tagging Yosys 0.3.0 | 2014-06-08 15:28:36 +02:00 |  | 
				
					
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									 Clifford Wolf | 94e9ee6bab | Updated ABC to 7600ffb9340c | 2014-06-08 10:12:39 +02:00 |  | 
				
					
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									 Clifford Wolf | 3af7c69d1e | added tests for new verilog features | 2014-06-07 12:26:11 +02:00 |  | 
				
					
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									 Clifford Wolf | 744e518467 | fixed cell array handling of positional arguments | 2014-06-07 12:17:11 +02:00 |  | 
				
					
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									 Clifford Wolf | e275e8eef9 | Add support for cell arrays | 2014-06-07 11:48:50 +02:00 |  | 
				
					
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									 Clifford Wolf | 0b1ce63a19 | Added support for repeat stmt in const functions | 2014-06-07 10:47:53 +02:00 |  | 
				
					
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									 Clifford Wolf | 7c8a7b2131 | further improved const function support | 2014-06-07 00:02:05 +02:00 |  | 
				
					
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									 Clifford Wolf | 5281562d0e | made the generate..endgenrate keywords optional | 2014-06-06 23:05:01 +02:00 |  | 
				
					
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									 Clifford Wolf | 76da2fe172 | improved const function support | 2014-06-06 22:55:02 +02:00 |  | 
				
					
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									 Clifford Wolf | 5c10d2ee36 | fix functions with no block (but single statement, loop, etc.) | 2014-06-06 21:29:23 +02:00 |  | 
				
					
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									 Clifford Wolf | c82db39935 | Added tests/simple/repwhile.v | 2014-06-06 17:47:20 +02:00 |  | 
				
					
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									 Clifford Wolf | ab54ce17c8 | improved ast simplify of const functions | 2014-06-06 17:40:45 +02:00 |  | 
				
					
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									 Clifford Wolf | b5cd7a0179 | added while and repeat support to verilog parser | 2014-06-06 17:40:04 +02:00 |  | 
				
					
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									 Clifford Wolf | f9c1cd5edb | Improved error message for options after front-end filename arguments | 2014-06-04 09:10:50 +02:00 |  | 
				
					
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									 Clifford Wolf | 7020f7fc13 | added tee cmd | 2014-06-03 09:23:31 +02:00 |  | 
				
					
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									 Clifford Wolf | 68c99bf734 | Fixed log messages in memory_dff | 2014-06-01 11:32:27 +02:00 |  | 
				
					
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									 Clifford Wolf | d5497f770b | Updated ABC to rev fa4404b395f0 | 2014-05-29 11:03:15 +02:00 |  | 
				
					
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									 Clifford Wolf | 61883b30f3 | Merge pull request #36 from hansiglaser/master Various changes merged | 2014-05-29 10:26:55 +02:00 |  | 
				
					
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									 Johann Glaser | 278085fa01 | added log_header to miter and expose pass, show cell type for exposed ports | 2014-05-28 18:05:38 +02:00 |  | 
				
					
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									 Johann Glaser | 63dfbb18cf | new flags -ignore_miss_func and -ignore_miss_dir for read_liberty | 2014-05-28 16:50:13 +02:00 |  | 
				
					
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									 Johann Glaser | 684c85902d | be more verbose when techmap yielded processes | 2014-05-26 17:13:41 +02:00 |  | 
				
					
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									 Clifford Wolf | 68c059565a | Fixed bug in opt_reduce (see vloghammer issue_044) | 2014-05-12 12:45:47 +02:00 |  | 
				
					
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									 Clifford Wolf | f69b5800c9 | fixed syntax error in dot file created by "show" command | 2014-05-10 16:22:56 +02:00 |  | 
				
					
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									 Clifford Wolf | 973959c7ea | Merge branch 'master' of github.com:cliffordwolf/yosys | 2014-05-09 18:24:13 +02:00 |  | 
				
					
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									 Clifford Wolf | bfd62268cc | Updated ABC to 67c84cdd49e4 | 2014-05-09 18:23:21 +02:00 |  | 
				
					
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									 Clifford Wolf | 51a615b26d | Progress in presentation | 2014-05-06 14:42:04 +02:00 |  | 
				
					
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									 Clifford Wolf | 30774ec6bc | Improved ezsat stand-alone tests | 2014-05-06 13:48:25 +02:00 |  | 
				
					
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									 Clifford Wolf | a5a519a9d1 | workaround for OpenBSD 'stdout' implementation | 2014-05-03 12:55:56 +02:00 |  | 
				
					
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									 Clifford Wolf | 75a5d6bd1e | workaround for OpenBSD 'stdin' implementation | 2014-05-02 13:22:26 +02:00 |  | 
				
					
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									 Clifford Wolf | f7e9056a93 | Merge pull request #35 from bentley/dox Typos and grammar fixes through chapter 4. | 2014-05-02 13:18:43 +02:00 |  | 
				
					
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									 Anthony J. Bentley | 154c9f8b51 | Typos and grammar fixes through chapter 4. | 2014-05-02 03:08:40 -06:00 |  | 
				
					
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									 Clifford Wolf | 7188542155 | Fixed clang -Wdeprecated-register warnings | 2014-04-20 14:28:23 +02:00 |  | 
				
					
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									 Clifford Wolf | a1be4816d6 | Replaced depricated %name-prefix= bison directive | 2014-04-20 14:22:11 +02:00 |  | 
				
					
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									 Clifford Wolf | d2d48996c4 | minisat compile fix | 2014-04-20 14:17:40 +02:00 |  | 
				
					
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									 Clifford Wolf | 12a3c05229 | Updated README | 2014-04-18 10:19:46 +02:00 |  | 
				
					
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									 Clifford Wolf | d18c10d991 | Merge pull request #33 from bentley/dox Typos and grammar fixes through chapter 2. | 2014-04-11 13:06:02 +02:00 |  | 
				
					
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									 Anthony J. Bentley | 9c1e578afe | Typos and grammar fixes through chapter 2. | 2014-04-11 02:42:59 -06:00 |  | 
				
					
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									 Clifford Wolf | 6ef2224331 | Merge pull request #31 from bentley/posix-rm Remove non-POSIX 'rm -v'. | 2014-04-05 02:56:28 +02:00 |  | 
				
					
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									 Anthony J. Bentley | 66a5da5edc | POSIX find requires a path argument. | 2014-04-04 16:51:27 -06:00 |  | 
				
					
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									 Anthony J. Bentley | b950197da1 | Remove non-POSIX 'rm -v'. | 2014-04-04 16:39:03 -06:00 |  | 
				
					
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									 Clifford Wolf | 7370ae01e9 | Added SIMLIB_NOLUT to simlib.v | 2014-04-02 21:28:33 +02:00 |  | 
				
					
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									 Clifford Wolf | e24797add0 | Added SIMLIB_NOSR to simlib.v | 2014-04-02 21:06:55 +02:00 |  | 
				
					
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									 Clifford Wolf | d4a1b0af5b | Added support for dlatchsr cells | 2014-03-31 14:14:40 +02:00 |  | 
				
					
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									 Clifford Wolf | a3b9692a68 | Fixed mapping of Verific WIDE_DFFRS operator | 2014-03-20 13:40:01 +01:00 |  | 
				
					
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									 Clifford Wolf | 470c2455e4 | Fixed mapping of Verific FADD primitive with unconnected outputs | 2014-03-20 13:26:52 +01:00 |  | 
				
					
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									 Clifford Wolf | 9a34486bfb | Fixed performance problem in opt_mux with nets driven by many conflicting drivers | 2014-03-19 10:05:01 +01:00 |  | 
				
					
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									 Clifford Wolf | cdf1257565 | Progress in Verific bindings | 2014-03-17 14:43:16 +01:00 |  | 
				
					
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									 Clifford Wolf | e164edc8d1 | Fixed typo in RTLIL::Module::addAdff() | 2014-03-17 14:41:41 +01:00 |  |