mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-04 05:19:11 +00:00
Code Activity
15958 commits 124 branches 59 tags 44 MiB
Commit graph

3 commits

Author SHA1 Message Date
Martin Povišer
4903f99f85 quicklogic: Add missing RAM_INIT param on TDP36K sim model 2023-12-04 15:52:03 +01:00
N. Engelhardt
6682693888 change ql-bram-types pass to use mode parameter; clean up primitive libraries 2023-12-04 15:52:02 +01:00
N. Engelhardt
48c1fdc33d add qlf_k6n10f architecture + bram inference 
(Copied from QuickLogic Yosys plugin repo)
 2023-12-04 15:52:02 +01:00