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2 commits

Author SHA1 Message Date
Eddie Hung 7a9d1be97d Add memory rules for RAM16X1D, RAM32M, RAM64M 2019-12-12 17:44:59 -08:00
Eddie Hung b97fe6e866 Work in progress for renaming labels/options in synth_xilinx 2019-07-18 14:20:43 -07:00
Renamed from techlibs/xilinx/drams.txt (Browse further)