Aritz Erkiaga
9a11204329
Update ALU MULT mode in gowin to match nextpnr
2024-12-23 11:12:48 +01:00
YRabbit
ab35dff702
Gowin. Add the EMCU primitive.
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EMCU is a micro-processor based on ARM Cortex-M3 embedded in the
GW1NSR-4C chip used in the Tangnano4k board.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-09-11 10:18:51 +10:00
David Lanzendörfer
d1b767ea8b
Adding missing to Gowin tech files
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Without OSER4_MEM, IDES4_MEM and DQS the synthesis of my Rocket Chip
design for my Sipeed Tang FPGA fails.
2024-08-18 19:38:31 +01:00
Emil J
43c1328fbb
Merge pull request #4479 from yrabbit/z1-power
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Gowin. Add an energy saving primitive
2024-07-18 11:56:00 +02:00
YRabbit
19bbdd8800
Gowin. Add the DCS primitive
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Not so much adding the primitive itself, but only its DCS_MODE
parameter, without which an error occurs.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-11 21:39:44 +10:00
YRabbit
9d0bca9775
Gowin. Add an energy saving primitive
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We add a BANDGAP primitive used to turn off power to OSC, PLL and other
things on some GOWIN chips.
We also mark this primitive and GSR as keep.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-06 18:58:21 +10:00
Lofty
294844137b
gowin: fix abc9 attributes and specify blocks
2023-10-04 00:16:10 +01:00
YRabbit
f9a6c0fcbd
gowin: Add serialization/deserialization primitives
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Primitives are added to convert parallel signals to serial and vice versa.
IDES4, IDES8, IDES10, IDES16, IVIDEO, OSER4, OSER8, OSER10, OSER16, OVIDEO.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-04-12 09:59:57 +01:00
Miodrag Milanović
bb28e48136
Merge pull request #3663 from uis246/master
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gowin: Add new types of oscillator
2023-02-28 06:56:01 +01:00
uis
ea6f562d49
gowin: Add new types of oscillator
2023-02-06 21:34:32 +00:00
martell
dbc8b77222
gowin: Add support for emulated differential output
2023-01-29 20:48:43 -08:00
YRabbit
d6a1e022e1
gowin: add a new type of PLL - PLLVR
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This primitive is used in the GW1NS-4, GW1NS-4C, GW1NSR-4, GW1NSR-4C and
GW1NSER-4C chips.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-01-11 11:41:29 +10:00
Tim Pambor
30bc0d26ea
gowin: Add oscillator primitives
2022-03-28 13:33:24 +02:00
YRabbit
19b7633aca
gowin: add support for Double Data Rate primitives
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Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2022-03-14 23:14:21 +01:00
YRabbit
22d9bbb308
gowin: Remove unnecessary attributes
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Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2022-02-24 05:38:33 +01:00
YRabbit
9b3cd4f0d8
gowin: Add support for true differential output
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Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2022-02-24 05:38:33 +01:00
Marcelina Kościelnicka
3a62fa0c97
gowin: Add remaining block RAM blackboxes.
2022-02-12 11:48:57 +01:00
Marcelina Kościelnicka
f61f2a4078
gowin: Fix LUT RAM inference, add more models.
2022-02-09 09:04:34 +01:00
Pepijn de Vos
c2d358484f
Gowin: deal with active-low tristate ( #2971 )
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* deal with active-low tristate
* remove empty port
* update sim models
* add expected lut1 to tests
2021-08-20 21:21:06 +02:00
Konrad Beckmann
5b9a975eba
synth_gowin: Add rPLL blackbox
2020-11-11 17:06:54 +01:00
Dan Ravensloft
7f45cab27a
synth_gowin: ABC9 support
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This adds ABC9 support for synth_gowin; drastically improving
synthesis quality.
2020-07-05 22:07:17 +02:00
Marcelina Kościelnicka
9beed4d771
gowin: Fix INIT values in sim library.
2020-07-05 03:03:48 +02:00
Pepijn de Vos
0f6269b04c
add IOBUF
2019-10-28 15:33:05 +01:00
Pepijn de Vos
903f997391
add tristate buffer and test
2019-10-28 15:18:01 +01:00
Pepijn de Vos
f88335a8a5
add wide luts
2019-10-28 12:49:08 +01:00
Pepijn de Vos
8226f2db0b
ALU sim tweaks
2019-10-24 13:39:43 +02:00
Pepijn de Vos
8a2699c40c
add negedge DFF
2019-10-21 12:31:11 +02:00
Pepijn de Vos
af7bdd598e
use ADDSUB ALU mode to remove inverters
2019-10-21 12:00:27 +02:00
Pepijn de Vos
72323e11a4
remove duplicate DFFR
2019-10-16 11:24:56 +02:00
Pepijn de Vos
2fb20f184a
Revert "add MUX support"
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It turns out that they make everything worse and they don't PnR.
This reverts commit 3eff2271d0
2019-09-06 11:28:17 +02:00
Pepijn de Vos
1b9f7f49b5
add more DFF to sim lib
2019-09-06 09:01:07 +02:00
Pepijn de Vos
5168b6ffa4
WIP aditional DFF primitives
2019-09-05 19:12:47 +02:00
Pepijn de Vos
3eff2271d0
add MUX support
2019-09-05 13:36:41 +02:00
Diego
f9272fc56d
GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow
2019-04-12 23:40:02 -05:00
Diego H
819ca73096
Changes in GoWin synth commands and ALU primitive support
2018-12-03 20:08:35 -06:00
Clifford Wolf
e9d73d2ee0
Indenting fixes in gowin sim cell lib
2016-11-08 18:54:00 +01:00
Clifford Wolf
cae5131bac
Added initial version of "synth_gowin"
2016-11-01 11:31:13 +01:00
