7 commits

Author	SHA1	Message	Date
Charlotte	75b44f21d1	fmt: rudimentary %m support (= %l)	2023-08-11 04:46:52 +02:00
Charlotte	c382d7d3ac	fmt: %t/$time support	2023-08-11 04:46:52 +02:00
Charlotte	b0f69f2cd5	tests: test cxxrtl against iverilog (and uncover bug!)	2023-08-11 04:46:52 +02:00
Charlotte	51d9b73107	fmt: tests completing again ... We need to invoke "read_verilog" manually, since the default action on input files is to defer processing. Under such conditions, we never simplify the AST, and initial $prints never execute.	2023-08-11 04:46:52 +02:00
Charlotte	1eff84cb92	fmt: ensure test exits on fail ... shebang not honoured when directly called with "bash run-test.sh".	2023-08-11 04:46:52 +02:00
whitequark	c285880684	fmt: add tests for Verilog round trip of format expressions.	2023-08-11 04:46:52 +02:00
whitequark	67052f62ec	fmt: add tests for Yosys evaluation of format expressions.	2023-08-11 04:46:52 +02:00