407 commits

Author	SHA1	Message	Date
Clifford Wolf	6971c4db62	Added RTLIL::Module::fixup_ports() API and RTLIL::*::rewrite_sigspecs() API	2013-06-18 17:11:13 +02:00
Clifford Wolf	21d9251e52	Added "dump" command (part ilang backend)	2013-06-02 17:53:30 +02:00
Clifford Wolf	88af5b6a16	Improved opt_share for reduce cells	2013-03-29 11:19:21 +01:00
Clifford Wolf	d4680fd5a0	Added design->select() api and use it in extract pass	2013-03-03 20:53:24 +01:00
Clifford Wolf	1bc0f04789	Added id2cstr API	2013-03-01 09:01:49 +01:00
Clifford Wolf	51c2b797b3	Do not unescape identifiers starting with \$	2013-03-01 01:10:11 +01:00
Clifford Wolf	7764d0ba1d	initial import	2013-01-05 11:13:26 +01:00