41 commits

Author	SHA1	Message	Date
Emil J. Tywoniak	fd1d75122d	patch: fix signorm commit broken by twine rename	2026-07-20 15:01:30 +02:00
Emil J. Tywoniak	92b16718c9	twine: fix replayability, reduce TwineSearch usage	2026-07-20 13:57:10 +02:00
Emil J. Tywoniak	65f35a88eb	WIP migration to twine	2026-07-20 12:27:18 +02:00
Emil J. Tywoniak	77ad54139e	WIP	2026-07-20 12:27:17 +02:00
Emil J. Tywoniak	e952044215	WIP	2026-07-20 12:27:17 +02:00
Emil J. Tywoniak	1210d8e117	WIP	2026-07-20 12:27:02 +02:00
Emil J. Tywoniak	6cd77a9af6	twine: start indexable colony with integer indices including preallocated twines	2026-07-20 12:27:02 +02:00
Emil J. Tywoniak	399cf1f970	BROKEN	2026-07-20 12:27:02 +02:00
Emil J. Tywoniak	30bc1c23ee	WIP	2026-07-20 12:27:02 +02:00
Emil J. Tywoniak	10436f31cd	WIP	2026-07-20 12:27:02 +02:00
Emil J. Tywoniak	301fc0a6a7	Patch: route staged cell names through per-Patch dict	2026-07-20 12:26:39 +02:00
Emil J. Tywoniak	d7f88dd3a0	rtlil: evacuate src_id_ from AttrObject to per-Design meta vector	2026-07-20 12:26:39 +02:00
Emil J. Tywoniak	f017bb8a93	twine	2026-07-20 12:26:39 +02:00
Emil J. Tywoniak	9cebc6e412	patch: split into single-output patch + multi-output patch_ports; drop input-cone gc	2026-07-17 23:49:06 +02:00
Emil J. Tywoniak	aab3ab7cf4	patch: gc collects src from every removed cell; ff.cc routes through Patch	2026-07-17 23:49:06 +02:00
Emil J. Tywoniak	f977f3e9ad	patch: merge src into existing cells; opt_merge/_inc + onehot + ff.cc use Patch	2026-07-17 23:49:06 +02:00
Emil J. Tywoniak	19b6338e52	utils: add BitGrouper for shared bit-partition logic	2026-07-17 23:49:06 +02:00
Emil J. Tywoniak	738b46941a	opt_expr: convert remaining rewrites to patcher	2026-07-17 23:49:06 +02:00
Emil J. Tywoniak	64c01eec65	patch: don't track root cell deletions for perf	2026-07-17 23:48:59 +02:00
Emil J. Tywoniak	8fe7d37945	patch: don't gc signorm cells	2026-07-17 23:48:59 +02:00
Emil J. Tywoniak	2c107f19e8	rtlil, patch: incremental signorm via connect_incremental, replacing batched sigNormalize in Patch::patch	2026-07-17 23:48:54 +02:00
Emil J. Tywoniak	fd67ce2b80	WIP	2026-07-17 23:48:54 +02:00
Emil J. Tywoniak	7652b1b52e	opt_expr: WIP use patcher more	2026-07-17 23:48:18 +02:00
Emil J. Tywoniak	900649282f	patch: cleanup	2026-07-17 23:48:12 +02:00
Emil J. Tywoniak	c7467e7edd	patch: infer leaves for gc	2026-07-17 23:48:12 +02:00
Emil J. Tywoniak	19d007cd65	patch: instead of cell->cell, use port->sig rewrites	2026-07-17 23:48:12 +02:00
Emil J. Tywoniak	169445f54a	patch: fix gc	2026-07-17 23:48:06 +02:00
Emil J. Tywoniak	d01b9816b3	patch: fix const handling	2026-07-17 23:48:06 +02:00
Emil J. Tywoniak	c7a8fe1c79	rtlil, patch: update signorm index and driver fields when committing Cell from Patch to Design	2026-07-17 23:48:06 +02:00
Emil J. Tywoniak	07d5115135	patch: source transfer	2026-07-17 23:48:06 +02:00
Emil J. Tywoniak	71f7f586aa	patch: working multi-cell signorm invariant	2026-07-17 23:48:06 +02:00
Emil J. Tywoniak	2c1d114cb1	patch: WIP multicell patch test	2026-07-17 23:48:00 +02:00
Emil J. Tywoniak	8818cade7a	patch: wires	2026-07-17 23:48:00 +02:00
Emil J. Tywoniak	9f0c1843d3	patch: signorm, move	2026-07-17 23:48:00 +02:00
Emil J. Tywoniak	a00631595f	patch: unique heap	2026-07-17 23:48:00 +02:00
Emil J. Tywoniak	277b6f47dc	rtlil: add CellAdderMixin for shared Cell adder interface between Module and Patch	2026-07-17 23:48:00 +02:00
Emil J. Tywoniak	fc07fd9332	patch: GC comment	2026-07-17 23:47:35 +02:00
Emil J. Tywoniak	240dda9186	test_patch total basics	2026-07-17 23:47:35 +02:00
Emil J. Tywoniak	62cd00aeeb	rtlil: allow friends to use Wire constructors with a factory token pattern	2026-07-17 23:47:08 +02:00
Emil J. Tywoniak	20b0a9934b	rtlil: allow friends to use Cell constructors with a factory token pattern	2026-07-17 23:47:08 +02:00
Emil J. Tywoniak	77dd01edfc	patcher: start	2026-07-17 23:47:08 +02:00