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Author	SHA1	Message	Date
Eddie Hung	ca0225fcfa	Re-enable dist RAM boxes for ECP5	2019-06-24 21:55:54 -07:00
Eddie Hung	152e682bd5	Add Xilinx dist RAM as comb boxes	2019-06-24 21:54:01 -07:00
Eddie Hung	49a762ba46	Fix abc9's scc breaker, also break on abc_scc_break attr	2019-06-24 21:53:18 -07:00
Eddie Hung	9dca024a30	Add tests/various/abc9.{v,ys} with SCC test	2019-06-24 21:52:53 -07:00
Eddie Hung	cec2292b0b	Merge remote-tracking branch 'origin/master' into xaig	2019-06-24 20:01:43 -07:00
Eddie Hung	b7deaceadd	Walk through as many muxes as exist for rd_en	2019-06-24 18:33:06 -07:00
Eddie Hung	a701a2accf	Add test	2019-06-24 18:32:58 -07:00
Eddie Hung	f1675b88f6	Merge remote-tracking branch 'origin/eddie/ram32x1d' into xc7mux	2019-06-24 16:39:18 -07:00
Eddie Hung	efd04880db	Add RAM32X1D support	2019-06-24 16:16:50 -07:00
Eddie Hung	c3df895bf4	Reduce MuxFx resources in mux techmapping	2019-06-24 15:16:44 -07:00
Eddie Hung	db6a0b72b2	Reduce number of decomposed muxes during techmap	2019-06-24 14:28:56 -07:00
Eddie Hung	2e7992efff	Revert "Fix techmapping muxes some more" ... This reverts commit 0aae3b4f43.	2019-06-24 14:15:31 -07:00
Eddie Hung	7fbfcf20d1	Move comment	2019-06-24 14:15:00 -07:00
Eddie Hung	0aae3b4f43	Fix techmapping muxes some more	2019-06-24 12:50:48 -07:00
Eddie Hung	2b4501503d	Fix mux techmapping	2019-06-24 12:18:17 -07:00
Eddie Hung	aa1eeda567	Modify costs for muxcover	2019-06-24 11:51:55 -07:00
Eddie Hung	c2387394e3	Revert Makefile	2019-06-24 11:50:37 -07:00
Eddie Hung	36e6da5396	Change synth_xilinx's -nomux to -minmuxf <int>	2019-06-24 10:04:01 -07:00
Clifford Wolf	e32cef4063	Merge pull request #1124 from mmicko/json_ports ... Add upto and offset to JSON ports	2019-06-24 08:52:12 +02:00
Eddie Hung	d54dceb547	Merge remote-tracking branch 'origin/xaig' into xc7mux	2019-06-22 19:44:17 -07:00
Eddie Hung	4ddc0354c1	Merge remote-tracking branch 'origin/master' into eddie/muxpack	2019-06-22 14:40:55 -07:00
Eddie Hung	6027549464	Add comments to ecp5 box	2019-06-22 14:33:47 -07:00
Eddie Hung	792d0670c3	Add comment to xc7 box	2019-06-22 14:28:24 -07:00
Eddie Hung	63182ed57d	Fix and cleanup ice40 boxes for carry in/out	2019-06-22 14:27:41 -07:00
Eddie Hung	7903ebe3e0	Carry in/out box ordering now move to end, not swap with end	2019-06-22 14:18:42 -07:00
Eddie Hung	65c022c257	Remove DFF and RAMD box info for now	2019-06-21 20:41:14 -07:00
Eddie Hung	8d18c256f0	Merge branch 'master' into xaig	2019-06-21 20:31:56 -07:00
Eddie Hung	fb8fab4a29	Add 'muxcover -dmux=<cost>' and '-nopartial' to CHANGELOG	2019-06-21 20:30:24 -07:00
Eddie Hung	bbf3ad90f5	Remove $_MUX4_ techmap rule	2019-06-21 18:12:33 -07:00
Eddie Hung	39e0e006d5	Fix wreduce call (!!!), tweak muxcover costs	2019-06-21 18:12:07 -07:00
Eddie Hung	6c2cb51996	Merge remote-tracking branch 'origin/xaig' into xc7mux	2019-06-21 17:44:21 -07:00
Eddie Hung	1abe93e48d	Merge remote-tracking branch 'origin/master' into xaig	2019-06-21 17:43:29 -07:00
Eddie Hung	0f300e75c0	Fix CHANGELOG	2019-06-21 17:39:56 -07:00
Eddie Hung	301e065aee	Merge remote-tracking branch 'origin/xaig' into xc7mux	2019-06-21 17:34:19 -07:00
Eddie Hung	f2ead4334a	Reduce log_debug spam in parse_xaiger()	2019-06-21 17:33:49 -07:00
Eddie Hung	e67e78e9ac	Merge remote-tracking branch 'origin/xaig' into xc7mux	2019-06-21 17:21:06 -07:00
Eddie Hung	ad296d77ab	Do not rename non LUT cells in abc9	2019-06-21 17:18:04 -07:00
Eddie Hung	fddb027cab	Replace assert with error message	2019-06-21 17:18:04 -07:00
Eddie Hung	7074ec9cd5	Add log_push()/log_pop() inside write_xaiger	2019-06-21 17:17:29 -07:00
Eddie Hung	588196c473	Add log_push()/log_pop() inside write_xaiger	2019-06-21 17:16:38 -07:00
Eddie Hung	e01bab6c64	Merge pull request #1108 from YosysHQ/clifford/fix1091 ... Add support for partial matches to muxcover	2019-06-21 17:13:41 -07:00
Eddie Hung	faa2d6fc1c	Constrain wreduce only if wide mux	2019-06-21 17:12:34 -07:00
Eddie Hung	aeee9dcad7	Simplify and comment out mux_map.v	2019-06-21 17:06:30 -07:00
Eddie Hung	ed00823b41	synth_xilinx to now wreduce except $mux, remove extra peepopt	2019-06-21 16:56:56 -07:00
Eddie Hung	29aee0989f	mux_map to no longer copy last value into 1'bx	2019-06-21 16:55:59 -07:00
Eddie Hung	8bce3fb329	Fix spacing	2019-06-21 16:55:34 -07:00
Eddie Hung	694d40719f	Fix spacing again, A_forward -> A_backward	2019-06-21 16:47:07 -07:00
Eddie Hung	11886c874c	Restore wreduce to synth_xilinx, after muxcover	2019-06-21 16:18:29 -07:00
Eddie Hung	44fc616fc7	Revert B_SIGNED optimisation, since only works for Y_WIDTH==1	2019-06-21 16:18:14 -07:00
Eddie Hung	4d6fac019a	Fix spacing	2019-06-21 16:06:13 -07:00