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Code Activity
2310 commits 97 branches 53 tags 41 MiB
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6 commits

Author SHA1 Message Date
Clifford Wolf 6c84341f22 Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
Clifford Wolf f9a307a50b namespace Yosys 2014-09-27 16:17:53 +02:00
Clifford Wolf 10e5791c5e Refactoring: Renamed RTLIL::Design::modules to modules_ 2014-07-27 11:18:30 +02:00
Clifford Wolf 4c4b602156 Refactoring: Renamed RTLIL::Module::cells to cells_ 2014-07-27 01:51:45 +02:00
Clifford Wolf a338d1a082 Added help messages for fsm_* passes 2013-03-01 12:35:12 +01:00
Clifford Wolf 7764d0ba1d initial import 2013-01-05 11:13:26 +01:00