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3 commits

Author SHA1 Message Date
Dan Ravensloft
1a07b330f8 intel_alm: Add multiply signedness to cells 
Quartus assumes unsigned multiplication by default, breaking signed
multiplies, so add an input signedness parameter to the MISTRAL_MUL*
cells to propagate to Quartus' <family>_mac cells.
 2020-08-26 22:50:16 +02:00
Miodrag Milanovic
9bd9db56c8 Unify verilog style 2019-10-18 12:50:24 +02:00
Miodrag Milanovic
5603595e5c Share common tests 2019-10-18 12:19:59 +02:00
Renamed from tests/arch/ecp5/mul.v (Browse further)