4070 commits

Author	SHA1	Message	Date
Eddie Hung	cac7f5d82e	Do not re-order carry chain ports, just precompute iteration order	2019-12-31 16:12:40 -08:00
Eddie Hung	dacdc6cc94	Remove abc9 -clk option	2019-12-30 22:59:14 -08:00
Eddie Hung	f1bf44ae8f	abc9_ops -prep_dff cope with lack of holes module	2019-12-30 22:58:39 -08:00
Eddie Hung	a367f703ea	Rename struct	2019-12-30 22:56:19 -08:00
Eddie Hung	fad99c2ec7	Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor	2019-12-30 20:14:24 -08:00
Eddie Hung	b42b64e8ed	Move Pass::call() out of abc9_ops into abc9	2019-12-30 19:23:54 -08:00
Eddie Hung	52f649dcfd	Use function arg	2019-12-30 18:47:06 -08:00
Eddie Hung	0317a2b476	holes_module to be whitebox	2019-12-30 18:46:22 -08:00
Eddie Hung	b50de28c04	Add abc9_ops -prep_holes	2019-12-30 18:00:49 -08:00
Eddie Hung	16c4ec7eda	Add abc9_ops -prep_dff	2019-12-30 16:36:33 -08:00
Eddie Hung	88b9c8d46d	Restore count_outputs, move process check to abc	2019-12-30 16:29:08 -08:00
Eddie Hung	dbffbeef5c	Fix struct name	2019-12-30 16:21:20 -08:00
Eddie Hung	7649ec72c9	Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor	2019-12-30 16:20:58 -08:00
Eddie Hung	4c3f517425	Remove delay targets doc	2019-12-30 16:11:42 -08:00
Eddie Hung	658f424d7d	Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor	2019-12-30 16:01:38 -08:00
Eddie Hung	0735572934	write_xaiger to use scratchpad for stats; cleanup abc9	2019-12-30 15:35:33 -08:00
Eddie Hung	22fe931c86	Grammar	2019-12-30 15:07:15 -08:00
Eddie Hung	fc4b8b8991	Remove submod changes	2019-12-30 14:56:14 -08:00
Eddie Hung	405e974fe5	Merge remote-tracking branch 'origin/master' into xaig_dff	2019-12-30 14:31:42 -08:00
Eddie Hung	d7ada66497	Add "synth_xilinx -dff" option, cleanup abc9	2019-12-30 14:13:16 -08:00
Eddie Hung	566d9fb77f	Revert "ABC to call retime all the time" ... This reverts commit 9aa94370a5.	2019-12-30 13:28:29 -08:00
Eddie Hung	52a27700e2	Grammar	2019-12-30 12:26:39 -08:00
Eddie Hung	f348ffa44d	abc9_techmap -> _map; called from abc9 script pass along with abc9_ops	2019-12-28 05:07:46 -08:00
Eddie Hung	ec25394808	Rename abc9.cc -> abc9_techmap.cc	2019-12-28 03:16:28 -08:00
Miodrag Milanovic	3e14ff1667	fixed invalid char	2019-12-25 20:38:48 +01:00
Marcin Kościelnicki	a24596def3	iopadmap: Emit tristate buffers with const OE for some edge cases.	2019-12-25 17:37:58 +01:00
Marcin Kościelnicki	e226a8f7f1	Minor nit fixes	2019-12-25 15:39:40 +01:00
Eddie Hung	1d0ac659ad	Fix OPMODE for PCIN->PCOUT cascades in xc6s, check B[01]REG too	2019-12-23 14:40:59 -08:00
Eddie Hung	75acaff6f5	Fix CEA/CEB check	2019-12-23 14:22:13 -08:00
Eddie Hung	edabe73377	Fix checking CE[AB] and for direct connections	2019-12-23 13:41:26 -08:00
Eddie Hung	71cac30309	Support unregistered cascades for A and B inputs	2019-12-23 12:38:18 -08:00
Eddie Hung	d00533eaa8	Add DSP48A* PCOUT -> PCIN cascade support	2019-12-23 11:42:46 -08:00
Eddie Hung	509070f82f	Disable clock domain partitioning in Yosys pass, let ABC do it	2019-12-23 08:36:20 -08:00
Marcin Kościelnicki	666c6128a9	xilinx_dsp: Initial DSP48A/DSP48A1 support.	2019-12-22 20:51:14 +01:00
Eddie Hung	1ea1e8e54f	Merge remote-tracking branch 'origin/master' into xaig_dff	2019-12-20 13:56:13 -08:00
Eddie Hung	1482f32d53	Merge pull request #1585 from YosysHQ/eddie/fix_abc9_lut ... Interpret "abc9 -lut" as lut string only if [0-9:]	2019-12-20 13:09:00 -08:00
Eddie Hung	f5e0a07ad6	Add $_FF_ and $_SR* courtesy of @mwkmwkmwk	2019-12-20 13:00:04 -08:00
Eddie Hung	d038cea3c7	More stringent check for flop cells	2019-12-20 12:32:00 -08:00
Eddie Hung	979bf36fb0	Split into $__ABC9_ASYNC[01], do not add cell->type to clkdomain_t	2019-12-19 11:23:41 -08:00
Eddie Hung	94f15f023c	Merge remote-tracking branch 'origin/master' into xaig_dff	2019-12-19 10:29:40 -08:00
Eddie Hung	269ba56a6d	Merge pull request #1581 from YosysHQ/clifford/fix1565 ... Fix sim for assignments with lhs<rhs size	2019-12-19 12:24:27 -05:00
Eddie Hung	3b559de6e9	Interpret "abc9 -lut" as lut string only if [0-9:]	2019-12-18 12:21:12 -08:00
Eddie Hung	d0afe4e10d	Merge branch 'master' of github.com:YosysHQ/yosys	2019-12-18 12:08:38 -08:00
Eddie Hung	b2a42e1fac	Merge pull request #1572 from nakengelhardt/scratchpad_pass ... add a command to read/modify scratchpad contents	2019-12-18 13:55:44 -05:00
Marcin Kościelnicki	a235250403	xilinx: Add xilinx_dffopt pass (#1557)	2019-12-18 13:43:43 +01:00
N. Engelhardt	3671ecc7d0	use extra_args	2019-12-18 12:30:30 +01:00
Eddie Hung	c9c77a90b3	Remove &verify -s	2019-12-17 16:11:54 -08:00
Eddie Hung	b1b99e421e	Use pool<> instead of std::set<> to preserver ordering	2019-12-17 16:10:40 -08:00
N. Engelhardt	c8bc1793a4	check scratchpad variable abc9.scriptfile	2019-12-17 19:39:55 +01:00
Clifford Wolf	41ed6ca7a5	Fix sim for assignments with lhs<rhs size, fixes #1565 ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-12-17 17:36:30 +01:00