gatecat
166a175983
abc9_ops: Don't leave unused derived modules lying around
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These later become accidentally used for techmap replacements for
blackboxes that we don't actually want.
Signed-off-by: gatecat <gatecat@ds0.me>
2022-05-23 15:02:25 +01:00
github-actions[bot]
0b1a1a576b
Bump version
2022-05-21 00:16:34 +00:00
Jannis Harder
795c445159
Merge pull request #3324 from jix/confusing-select-errors
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select: Fix -assert-none and -assert-any error output and docs
2022-05-20 17:40:40 +02:00
Jannis Harder
fc65ea47df
select: Fix -assert-none and -assert-any error output and docs
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Both of these options consider a selection containing only empty modules
as non-empty. This wasn't mentioned in the documentation nor did the
error message when using `select -assert-none` list those empty modules,
which produced a very confusing error message complaining about a
non-empty selection followed by an empty listing of the selection.
This fixes the documentation and changes the `-assert-none` and
`-assert-any` assertion error messages to also output fully selected
modules (this includes selected empty modules).
It doesn't change the messages for `-assert-count` etc. as they don't
count modules.
2022-05-19 14:07:34 +02:00
github-actions[bot]
015ca4ddac
Bump version
2022-05-19 00:17:59 +00:00
Marcelina Kościelnicka
606f1637ae
Add memory_bmux2rom pass.
2022-05-18 22:48:55 +02:00
Marcelina Kościelnicka
982a11c709
Add memory_libmap tests.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
2a2dc12eb6
gatemate: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
2dcb0797f0
machxo2: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
9d11575856
efinix: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
f4d1426229
anlogic: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
d7dc2313b9
ice40: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
3b2f95953c
xilinx: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
e4d811561c
gowin: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
0a8eaca322
nexus: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
a04b025abf
ecp5: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
7c5dba8b77
Add memory_libmap pass.
2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka
9450f308f0
proc_rom: Add special handling of const-0 address bits.
2022-05-18 17:32:30 +02:00
github-actions[bot]
06ef3f264a
Bump version
2022-05-18 00:16:27 +00:00
Miodrag Milanović
7c64c70727
Merge pull request #3310 from robinsonb5-PRs/master
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Now calls Tcl_Init after creating the interp, fixes clock format.
2022-05-17 09:33:20 +02:00
Marcelina Kościelnicka
98c7804b89
opt_ffinv: Use ModIndex instead of ModWalker.
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This avoids using out-of-data index information.
2022-05-17 02:52:21 +02:00
Alastair M. Robinson
6c6017c973
Use log_warning when Tcl_Init fails, report error with Tcl_ErrnoMsg.
2022-05-16 20:22:28 +01:00
Jannis Harder
2864f2826a
Merge pull request #3314 from jix/sva_value_change_logic_wide
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verific: Use new value change logic also for $stable of wide signals.
2022-05-16 16:15:04 +02:00
github-actions[bot]
3f8fb28cd2
Bump version
2022-05-14 00:19:50 +00:00
Marcelina Kościelnicka
2858bb03cd
Add opt_ffinv pass.
2022-05-13 23:02:30 +02:00
github-actions[bot]
f56a3bd48f
Bump version
2022-05-13 00:19:56 +00:00
Marcelina Kościelnicka
990c9b8e11
Add proc_rom pass.
2022-05-13 00:37:14 +02:00
Jannis Harder
fada77b8cf
verific: Use new value change logic also for $stable of wide signals.
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I missed this in the previous PR.
2022-05-11 13:05:27 +02:00
Alastair M. Robinson
83dbea1689
Now calls Tcl_Init after creating the interp, fixes clock format.
2022-05-10 18:48:54 +01:00
github-actions[bot]
c862b1dbfb
Bump version
2022-05-10 00:16:26 +00:00
Jannis Harder
587e09d551
Merge pull request #3305 from jix/sva_value_change_logic
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verific: Improve logic generated for SVA value change expressions
2022-05-09 16:40:34 +02:00
Jannis Harder
5ca2ee0c31
Merge pull request #3297 from jix/sva_nested_clk_else
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verific: Fix conditions of SVAs with explicit clocks within procedures
2022-05-09 16:07:39 +02:00
Jannis Harder
a855d62b42
verific: Improve logic generated for SVA value change expressions
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The previously generated logic assumed an unconstrained past value in
the initial state and did not handle 'x values. While the current formal
verification flow uses 2-valued logic, SVA value change expressions
require a past value of 'x during the initial state to behave in the
expected way (i.e. to consider both an initial 0 and an initial 1 as
$changed and an initial 1 as $rose and an initial 0 as $fell).
This patch now generates logic that at the same time
a) provides the expected behavior in a 2-valued logic setting, not
depending on any dont-care optimizations, and
b) properly handles 'x values in yosys simulation
2022-05-09 15:04:01 +02:00
Miodrag Milanovic
d562bfd165
Next dev cycle
2022-05-09 10:12:32 +02:00
Miodrag Milanovic
6f9602b4cf
Release version 0.17
2022-05-09 10:11:04 +02:00
Miodrag Milanovic
72d2efeb32
Update CHANGELOG
2022-05-09 10:06:15 +02:00
Miodrag Milanovic
65f70b9d50
Update manual
2022-05-09 09:53:01 +02:00
Miodrag Milanović
58b23954e8
Merge pull request #3299 from YosysHQ/mmicko/sim_memory
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sim pass: support for memories
2022-05-09 09:28:09 +02:00
Miodrag Milanovic
600079e281
Fix running sva tests
2022-05-09 09:01:57 +02:00
github-actions[bot]
9c69e9f8a6
Bump version
2022-05-08 00:16:45 +00:00
Marcelina Kościelnicka
77b1dfd8c3
opt_mem: Remove constant-value bit lanes.
2022-05-07 23:13:16 +02:00
github-actions[bot]
048170d376
Bump version
2022-05-07 00:15:38 +00:00
Miodrag Milanovic
37b6614718
include latest abc changes
2022-05-06 15:52:24 +02:00
Miodrag Milanovic
7fcf976f9e
include latest abc changes
2022-05-06 15:42:39 +02:00
Miodrag Milanović
384d2120ee
Merge pull request #3300 from imhcyx/master
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memory_share: fix wrong argidx in extra_args
2022-05-06 09:17:59 +02:00
Miodrag Milanovic
52d8ddee0c
Include abc change to fix FreeBSD build
2022-05-06 08:08:06 +02:00
Miodrag Milanovic
d8adbff72f
Handle possible non-memory indexed data
2022-05-06 08:05:23 +02:00
imhcyx
71166eeecf
memory_share: fix wrong argidx in extra_args
2022-05-05 16:58:39 +08:00
github-actions[bot]
a8cc0c3930
Bump version
2022-05-05 00:15:34 +00:00
Marcelina Kościelnicka
18a48b1337
abc: Use dict/pool instead of std::map/std::set
2022-05-04 22:04:50 +02:00
