57 commits

Author	SHA1	Message	Date
Clifford Wolf	7bd2d1064f	Using log_assert() instead of assert()	2014-07-28 11:27:48 +02:00
Clifford Wolf	10e5791c5e	Refactoring: Renamed RTLIL::Design::modules to modules_	2014-07-27 11:18:30 +02:00
Clifford Wolf	4c4b602156	Refactoring: Renamed RTLIL::Module::cells to cells_	2014-07-27 01:51:45 +02:00
Clifford Wolf	f9946232ad	Refactoring: Renamed RTLIL::Module::wires to wires_	2014-07-27 01:49:51 +02:00
Clifford Wolf	946ddff9ce	Changed a lot of code to the new RTLIL::Wire constructors	2014-07-26 20:12:50 +02:00
Clifford Wolf	f8fdc47d33	Manual fixes for new cell connections API	2014-07-26 15:58:23 +02:00
Clifford Wolf	b7dda72302	Changed users of cell->connections_ to the new API (sed command) ... git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;'	2014-07-26 15:58:23 +02:00
Clifford Wolf	cc4f10883b	Renamed RTLIL::{Module,Cell}::connections to connections_	2014-07-26 11:58:03 +02:00
Clifford Wolf	2bec47a404	Use only module->addCell() and module->remove() to create and delete cells	2014-07-25 17:56:19 +02:00
Clifford Wolf	6aa792c864	Replaced more old SigChunk programming patterns	2014-07-24 23:10:58 +02:00
Clifford Wolf	c094c53de8	Removed RTLIL::SigSpec::optimize()	2014-07-23 20:32:28 +02:00
Clifford Wolf	a62c21c9c6	Removed RTLIL::SigSpec::expand() method	2014-07-23 19:34:51 +02:00
Clifford Wolf	ec923652e2	Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3	2014-07-23 09:52:55 +02:00
Clifford Wolf	a8d3a68971	Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3	2014-07-23 09:49:43 +02:00
Clifford Wolf	260c19ec5a	Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3	2014-07-23 09:34:47 +02:00
Clifford Wolf	4b4048bc5f	SigSpec refactoring: using the accessor functions everywhere	2014-07-22 20:39:37 +02:00
Clifford Wolf	a233762a81	SigSpec refactoring: renamed chunks and width to __chunks and __width	2014-07-22 20:39:37 +02:00
Siesh1oo	8127d5e8c3	- kernel/register.h, kernel/driver.cc: refactor rewrite_yosys_exe()/get_share_file_name() to portable proc_self_dirname()/proc_share_dirname(). ... This refactoring improves robustness and allows OSX support with only 7 new lines of code, and easy extension for other systems. - passes/abc/abc.cc, passes/cmds/show.cc, passes/techmap/techmap.cc: use new, refactored semantics.	2014-03-12 23:17:14 +01:00
Clifford Wolf	91704a7853	Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys ... (see https://github.com/cliffordwolf/yosys/pull/28)	2014-03-11 14:24:24 +01:00
Clifford Wolf	fa75c8286e	Fixed memory corruption in passes/abc/blifparse.cc	2014-03-11 13:09:01 +01:00
Clifford Wolf	22aabe05c9	Verbose reading of liberty and constr files in ABC pass	2014-03-09 15:15:38 +01:00
Clifford Wolf	3121d19d95	Added abc -keepff option	2014-02-14 11:28:42 +01:00
Clifford Wolf	de3ea9269a	updated default ABC command strings	2014-02-13 19:14:15 +01:00
Clifford Wolf	a123941618	Updated ABC	2014-02-13 18:56:36 +01:00
Clifford Wolf	b463907890	Removed double blanks in ABC default command sequences	2014-02-13 08:12:52 +01:00
Clifford Wolf	7664f5d92b	Updated ABC and some related changes	2014-02-13 08:07:08 +01:00
Clifford Wolf	ab71bd0746	Updated ABC to rev e97a6e1d59b9	2014-02-12 08:35:42 +01:00
Clifford Wolf	03ee63ff80	Added support for "keep" attribute to abc pass	2014-02-08 14:25:29 +01:00
Clifford Wolf	99b1e9ee56	Re-enabled abc "retime" after sorting yout the yosys-bigsim problem	2014-02-07 16:36:37 +01:00
Clifford Wolf	0192f1c66e	Disabled ABC retime for now (elliptic_curve_group testcase in yosys-bigsim failed)	2014-02-06 22:31:58 +01:00
Clifford Wolf	58cb8d65af	Added "retime" to standard ABC recipes	2014-02-06 22:16:20 +01:00
Clifford Wolf	69e867f3e8	Added support for inline commands to abc -script	2014-02-04 22:01:53 +01:00
Clifford Wolf	e09ebf475c	Fixed use of limited length buffer in ABC blif parser	2013-12-31 21:58:35 +01:00
Clifford Wolf	4892a3ce6d	Added abc -dff and -clk support	2013-12-31 21:25:09 +01:00
Clifford Wolf	be5dab87fd	Now using BLIF as ABC input format	2013-12-31 14:29:29 +01:00
Clifford Wolf	c616802ac7	Always use BLIF as ABC output format	2013-12-31 13:41:16 +01:00
Clifford Wolf	38e7fa6530	Tighter integration of ABC build	2013-11-27 09:08:35 +01:00
Clifford Wolf	1c4a6411af	Updated abc	2013-11-21 22:39:10 +01:00
Clifford Wolf	63285b300c	Renamed temp module generated by "abc" pass from "logic" to "netlist"	2013-11-19 01:03:57 +01:00
Clifford Wolf	a694324a75	Fixed abc pass blif parser for constant bits	2013-11-13 15:46:28 +01:00
Clifford Wolf	1af1cebb64	Minor fixes in abc build instructions and abc pass	2013-08-20 09:46:05 +02:00
Clifford Wolf	ad9bbcbf40	Added $lut cells and abc lut mapping support	2013-07-23 16:19:34 +02:00
Clifford Wolf	c09b66b2a1	Added support for "assign" statements in abc vlparse	2013-06-15 13:50:38 +02:00
Clifford Wolf	bf59a28f80	Look for yosys-abc and yosys-svgviewer where the main exe is	2013-06-09 00:07:26 +02:00
Clifford Wolf	6c8a424872	Added "make abc" and "make install-abc"	2013-06-08 23:48:19 +02:00
Clifford Wolf	585fcace10	Fixed a gcc vs. clang determinism problem in abc pass	2013-05-23 16:17:23 +02:00
Clifford Wolf	52914c2e68	Fixed abc eeror handling	2013-03-18 07:31:59 +01:00
Johann Glaser	cd8008bda0	fixed typos	2013-03-18 07:28:31 +01:00
Clifford Wolf	ba3793b642	Fixed strerrno vs. strerror types in ABC pass	2013-03-17 09:28:58 +01:00
Clifford Wolf	1390de4b74	Cleaned up ABC file/io error handling	2013-03-17 09:17:18 +01:00