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Author SHA1 Message Date
Eddie Hung b9e19071b8 Add delays to cells.box 2019-04-09 14:32:10 -07:00
Eddie Hung d536379c62 Add "-lut <file>" support to abc9 2019-04-09 14:31:31 -07:00
Keith Rothman e107ccdde8 Fix LUT6_2 definition. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-09 11:43:19 -07:00
Eddie Hung f2042fc7c4 synth_xilinx with abc9 to use -box 2019-04-09 11:01:46 -07:00
Eddie Hung 2ae26b986c Add techlibs/xilinx/cells.box 2019-04-09 10:58:58 -07:00
Eddie Hung 7e304c362b Add "-box" option to abc9 2019-04-09 10:58:06 -07:00
Eddie Hung bd523abef5 Add 'setundef -zero' call prior to aigmap in abc9 2019-04-09 10:32:58 -07:00
Eddie Hung 3b6f85b0a6 Comment out 2019-04-09 10:09:43 -07:00
Eddie Hung 3fc474aa73 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-09 10:06:44 -07:00
Zachary Snow 5855024ccc support repeat loops with constant repeat counts outside of constant functions 2019-04-09 12:28:32 -04:00
Keith Rothman 5e0339855f Add additional cells sim models for core 7-series primatives. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-09 09:01:53 -07:00
Eddie Hung 0deaccbaae
Fix a few typos 2019-04-08 16:46:33 -07:00
Eddie Hung 12c34136ba More space fixing 2019-04-08 16:40:17 -07:00
Eddie Hung 36efec01b8 Fix spacing 2019-04-08 16:37:22 -07:00
Eddie Hung bca3cf6843 Merge branch 'master' into xaig 2019-04-08 16:31:59 -07:00
Eddie Hung 6797f6b6c4 $_XILINX_SHREG_ to preserve src attribute 2019-04-08 16:24:20 -07:00
Eddie Hung f6c354c55b Update CHANGELOG 2019-04-08 16:22:07 -07:00
Eddie Hung 7e773741ab Merge branch 'undo_pr895' into xc7srl 2019-04-08 16:07:52 -07:00
Eddie Hung 13fc70d7a4 Undo #895 by instead setting an attribute 2019-04-08 16:05:24 -07:00
Eddie Hung 93b1621911 Cope with undoing #895 2019-04-08 15:57:07 -07:00
Clifford Wolf e194e65358
Merge pull request #919 from YosysHQ/multiport_transp 
memory_bram: Fix multiport make_transp
 2019-04-08 21:14:05 +02:00
Eddie Hung d3930ca79e Revert "Remove handling for $pmux, since #895" 
This reverts commit aa693d5723.
 2019-04-08 12:01:06 -07:00
David Shah 2bf3ca6443 memory_bram: Fix multiport make_transp 
Signed-off-by: David Shah <dave@ds0.me>
 2019-04-07 16:56:31 +01:00
Benedikt Tutzer e19981ab61 Suppress error from the compiler run during libboost-python* detection 2019-04-07 10:11:35 +02:00
Eddie Hung 1d526b7f06 Call shregmap twice -- once for variable, another for fixed 2019-04-05 17:35:49 -07:00
Eddie Hung 4afcad70e2 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 16:30:17 -07:00
Eddie Hung ad602438b8 Add retime test 2019-04-05 16:28:46 -07:00
Eddie Hung d559023007 Fix S0 -> S1 2019-04-05 16:28:14 -07:00
Eddie Hung a5f33b5409 Move dffinit til after abc 2019-04-05 16:20:43 -07:00
Eddie Hung 0364a5d811 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 15:46:18 -07:00
Eddie Hung 9758701574 Move techamp t:$_DFF_?N? to before abc call 2019-04-05 15:39:05 -07:00
Eddie Hung 23a6533e98 Retry 2019-04-05 15:31:54 -07:00
Eddie Hung 3c253818ca "&nf -D 0" fails => use "-D 1" instead 2019-04-05 15:30:19 -07:00
Eddie Hung 8b6085254a Resolve @daveshah1 comment, update synth_xilinx help 2019-04-05 15:15:13 -07:00
Eddie Hung ff0912c75e synth_xilinx to techmap FFs after abc call, otherwise -retime fails 2019-04-05 14:43:06 -07:00
Eddie Hung 19271bd996 abc -dff now implies "-D 0" otherwise retiming doesn't happen 2019-04-05 14:42:25 -07:00
Eddie Hung 544843da71 techmap inside map_cells stage 2019-04-05 12:55:52 -07:00
Clifford Wolf dfb242c905 Add "read_ilang -lib" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-05 17:31:49 +02:00
Benedikt Tutzer cc270ea81b Autodetect Python paths and boost python libraries for different distributions 2019-04-05 11:56:01 +02:00
Clifford Wolf 75ca06526a Added missing argument checking to "mutate" command 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-04 18:10:10 +02:00
Eddie Hung 7b7ddbdba7 Merge branch 'map_cells_before_map_luts' into xc7srl 2019-04-04 08:13:34 -07:00
Eddie Hung e3f20b17af Missing techmap entry in help 2019-04-04 08:13:10 -07:00
Eddie Hung 2fb02247a7 Use soft-logic, not LUT3 instantiation 2019-04-04 08:10:40 -07:00
Eddie Hung 572603409c Merge branch 'map_cells_before_map_luts' into xc7srl 2019-04-04 07:54:42 -07:00
Eddie Hung d9cb787391 synth_xilinx to map_cells before map_luts 2019-04-04 07:48:13 -07:00
Eddie Hung 77755b5a66 Cleanup comments 2019-04-04 07:41:40 -07:00
Eddie Hung 736e19f02d t:$dff* -> t:$dff t:$dffe 2019-04-04 07:39:19 -07:00
Benedikt Tutzer cae657cebd Used PyImport_ImportModule instead of PyImport_Import to avoid the explicit conversion to a python string 2019-04-04 10:35:01 +02:00
Benedikt Tutzer 574dfb2ef9 Removed link to experimental filesystem library 2019-04-04 09:51:14 +02:00
Benedikt Tutzer e64b3f1074 Changed filesystem dependency to boost instead of experimental std library 2019-04-04 09:24:50 +02:00