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Author SHA1 Message Date
Eddie Hung 3e0f73c3df abc9 to not call "clean" at end of run (often called outside) 2019-08-29 12:12:59 -07:00
Sergey 5dda8f39a6
Merge pull request #2 from YosysHQ/master 
Pull from upstream
 2019-08-29 21:09:40 +03:00
Sergey d360693040
Merge pull request #3 from YosysHQ/Sergey/tests_ice40 
Merge my changes to tests_ice40 branch
 2019-08-29 21:07:34 +03:00
Eddie Hung 1467761060 Fix typo that's gone unnoticed for 5 months!?! 2019-08-29 10:33:28 -07:00
Eddie Hung 67587bad7f Add constant expression attribute to test 2019-08-29 09:10:20 -07:00
Eddie Hung 83ffec26cb Remove newline 2019-08-29 09:08:58 -07:00
Eddie Hung 6510297712 Restore non-deferred code, deferred case to ignore non constant attr 2019-08-29 09:02:10 -07:00
Eddie Hung 25b1670a84 Rename boxes too 2019-08-29 07:03:32 -07:00
Clifford Wolf 89695fd3ab Bump YOSYS_VER 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-29 12:05:26 +02:00
SergeyDegtyar d588c6898f Add comments for examples from Lattice user guide 2019-08-29 10:49:46 +03:00
Eddie Hung c4e5310823 Use a dummy box file if none specified 2019-08-28 20:58:55 -07:00
Eddie Hung 116c249601 -auto-top should check $abstract (deferred) modules with (* top *) 2019-08-28 19:59:25 -07:00
Eddie Hung 34ae29295d read_verilog -defer should still populate module attributes 2019-08-28 19:59:09 -07:00
Eddie Hung 1fdb3fc98c Add failing test 2019-08-28 19:58:58 -07:00
Eddie Hung e8e3830868 Comment out SB_MAC16 arrival time for now, need to handle all its modes 2019-08-28 19:09:29 -07:00
Eddie Hung 309684af16 Add arrival for SB_MAC16.O 2019-08-28 19:07:28 -07:00
Eddie Hung efa4ee5c0e Add arrival times for U 2019-08-28 19:03:29 -07:00
Eddie Hung 4bda902f1b LX -> LP 2019-08-28 19:02:54 -07:00
Eddie Hung 0f4e9f6bc5 Round not floor 2019-08-28 18:57:34 -07:00
Eddie Hung 927f1e3754 Add LP timings 2019-08-28 18:56:25 -07:00
Eddie Hung e3709e5ee6 LX -> LP 2019-08-28 18:51:14 -07:00
Eddie Hung 5c42455350 Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival 2019-08-28 18:50:20 -07:00
Eddie Hung 13ecd8b0df Add run-test.sh too 2019-08-28 18:47:48 -07:00
Eddie Hung a4f641f230 Do not overwrite LUT param 2019-08-28 18:46:53 -07:00
Eddie Hung e301a3dadb Add SB_CARRY to ice40_opt test 2019-08-28 18:46:53 -07:00
Eddie Hung dd42aa87b9 Add ice40_opt test 2019-08-28 18:46:53 -07:00
Eddie Hung c0b99ed0e8 Do not overwrite LUT param 2019-08-28 18:45:09 -07:00
Eddie Hung cd5d6940e1 Add SB_CARRY to ice40_opt test 2019-08-28 18:44:57 -07:00
Eddie Hung bf046ba09c Add ice40_opt test 2019-08-28 18:34:32 -07:00
Eddie Hung 4eb5847dbd Cleanup 2019-08-28 18:10:33 -07:00
Eddie Hung 3247442bf9 Revert "Revert "Fix omode which inserts an output if none exists (otherwise abc9 breaks)"" 
This reverts commit 8f0c1232d7.
 2019-08-28 17:34:00 -07:00
Eddie Hung 082a01954b Revert "Output "h" extension only if boxes" 
This reverts commit 399ac760ff.
 2019-08-28 17:30:54 -07:00
Eddie Hung 070f3ac561 Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival 2019-08-28 17:29:25 -07:00
Eddie Hung d46d38e4d5 Trailing comma 2019-08-28 17:25:54 -07:00
Eddie Hung f5b4bc847c Adapt to $__ICE40_CARRY_WRAPPER 2019-08-28 17:25:05 -07:00
Eddie Hung e569f13870 Revert "Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with" 
This reverts commit 2aedee1f0e.
 2019-08-28 17:22:44 -07:00
Eddie Hung 2421cb3fed Add arrival times for HX devices 2019-08-28 17:21:37 -07:00
Eddie Hung e4f89e01b5 Specify ice40 family to cells_sim.v using define 2019-08-28 17:21:12 -07:00
Eddie Hung 345a572449 Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival 2019-08-28 17:19:02 -07:00
Eddie Hung 2aedee1f0e Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with 
CARRY_WRAPPER in the same way since I0 and I3 could be used
 2019-08-28 17:07:36 -07:00
Eddie Hung 077e9d4ada Update box size and timings 2019-08-28 17:07:24 -07:00
Eddie Hung 129df7184a Update to new $__ICE40_CARRY_WRAPPER 2019-08-28 17:07:07 -07:00
Eddie Hung 0af64df10c Account for D port being a constant 2019-08-28 15:32:38 -07:00
Eddie Hung a45c09c8d1 Account for D port being a constant 2019-08-28 15:31:55 -07:00
Eddie Hung 1b08f861b6 Merge branch 'eddie/xilinx_srl' into xaig_arrival 2019-08-28 15:31:48 -07:00
Eddie Hung 8d820a9884 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-28 15:19:10 -07:00
Eddie Hung b8a9f73089 Comment out *.sh used for testbenches as we have no more 2019-08-28 12:36:20 -07:00
Eddie Hung fc727fa5c9
Merge pull request #1334 from YosysHQ/clifford/async2synclatch 
Add $dlatch support to async2sync
 2019-08-28 12:36:06 -07:00
Eddie Hung 87d5d9b8c8 Use equiv for memory and dpram 2019-08-28 12:30:35 -07:00
Eddie Hung ebd0a1875b Use equiv_opt for latches 2019-08-28 12:21:15 -07:00