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6 commits

Author SHA1 Message Date
Martin Povišer
0d484818a7 ql_dsp_io_regs: Add DSPv2 support, adjust sim model
Add support for cell type dispatching of the new DSP block; adjust the
definition of MULT and MULTACC variants to support those instances
starting a cascading chain.
2025-03-11 16:35:38 +01:00
Emil J. Tywoniak
fb3ad314ba quicklogic: ql_dsp_io_regs debug print 2025-03-11 10:35:31 +01:00
Miodrag Milanovic
627fbc3477 Fix Windows build by forcing initialization order, fixes #4068 2024-01-02 11:26:48 +01:00
Martin Povišer
b30544d61d ql_dsp_io_regs: Fix ID strings, constant detection 2023-12-04 15:52:03 +01:00
Martin Povišer
7d738b07da ql_dsp_*: Clean up
Clean up the code up to Yosys standards. Drop detection of
QL_DSP2_MULTADD in io_regs since those cells can't be inferred with
the current flow anyway.
2023-12-04 15:52:02 +01:00
N. Engelhardt
20d864bbde add dsp inference 2023-12-04 15:52:02 +01:00