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									 Clifford Wolf | 90d8329f64 | Improve Verific SVA import: negedge and $past | 2017-07-27 11:40:07 +02:00 |  | 
				
					
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									 Clifford Wolf | 147ff96ba3 | Improve Verific SVA importer | 2017-07-27 10:39:39 +02:00 |  | 
				
					
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									 Clifford Wolf | 530040ba6f | Improve Verific bindings (mostly related to SVA) | 2017-07-26 18:00:01 +02:00 |  | 
				
					
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									 Clifford Wolf | abd3b4e8e7 | Improve "help verific" message | 2017-07-25 15:13:22 +02:00 |  | 
				
					
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									 Clifford Wolf | 6dbe1d4c92 | Add "verific -extnets" | 2017-07-25 14:53:11 +02:00 |  | 
				
					
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									 Clifford Wolf | c97c92e4ec | Improve "verific -all" handling | 2017-07-25 13:33:25 +02:00 |  | 
				
					
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									 Clifford Wolf | 41be530c4e | Add "verific -import -d <dump_file" | 2017-07-24 13:57:16 +02:00 |  | 
				
					
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									 Clifford Wolf | 92d3aad670 | Add "verific -import -flatten" and "verific -import -v" | 2017-07-24 11:29:06 +02:00 |  | 
				
					
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									 Clifford Wolf | 5be535517c | Add "verific -import -k" | 2017-07-22 16:16:44 +02:00 |  | 
				
					
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									 Clifford Wolf | 2785aaffeb | Improve docs for verific bindings, add simply sby example | 2017-07-22 11:58:51 +02:00 |  | 
				
					
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									 Clifford Wolf | 28039c3063 | Add Verific Release information to log | 2017-07-04 20:01:30 +02:00 |  | 
				
					
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									 Clifford Wolf | cdb6ceb8c6 | Add support for verific mem initialization | 2017-02-11 15:57:36 +01:00 |  | 
				
					
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									 Clifford Wolf | c449f4b86f | Fix another stupid bug in the same line | 2017-02-11 11:47:51 +01:00 |  | 
				
					
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									 Clifford Wolf | fa4a7efe15 | Add verific support for initialized variables | 2017-02-11 11:40:18 +01:00 |  | 
				
					
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									 Clifford Wolf | 0b7aac645c | Improve handling of Verific warnings and error messages | 2017-02-11 11:39:50 +01:00 |  | 
				
					
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									 Clifford Wolf | eb7b18e897 | Fix extremely stupid typo | 2017-02-11 11:09:07 +01:00 |  | 
				
					
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									 Clifford Wolf | 2ca8d483dd | Add "rand" and "rand const" verific support | 2017-02-09 12:53:46 +01:00 |  | 
				
					
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									 Clifford Wolf | 1d1f56a361 | Add PSL parser mode to verific front-end | 2017-02-08 10:40:33 +01:00 |  | 
				
					
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									 Clifford Wolf | 3928482a3c | Add $cover cell type and SVA cover() support | 2017-02-04 14:14:26 +01:00 |  | 
				
					
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									 Clifford Wolf | 911c44d164 | Add assert/assume support to verific front-end | 2017-02-04 13:36:00 +01:00 |  | 
				
					
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									 Clifford Wolf | 0bc95f1e04 | Added "yosys -D" feature | 2016-04-21 23:28:37 +02:00 |  | 
				
					
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									 Clifford Wolf | 7bd329afa0 | Support for more Verific primitives (patch I got per email) | 2016-02-13 08:19:30 +01:00 |  | 
				
					
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									 Clifford Wolf | 6a27cbe5b1 | Bugfix in Verific front-end | 2016-02-03 08:59:57 +01:00 |  | 
				
					
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									 Clifford Wolf | 4a3e1ded1e | Updated verific build instructions | 2016-02-02 19:50:17 +01:00 |  | 
				
					
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									 Clifford Wolf | ba407da187 | Added addBufGate module method | 2016-02-02 11:26:07 +01:00 |  | 
				
					
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									 Clifford Wolf | ab2d8e5c8c | Added PRIM_DLATCHRS support to verific front-end | 2015-11-24 12:16:19 +01:00 |  | 
				
					
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									 Clifford Wolf | 415e0a1b90 | Fixed performance bug in Verific importer | 2015-11-16 12:38:56 +01:00 |  | 
				
					
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									 Clifford Wolf | b18f3a2974 | Changes for Verific 3.16_484_32_151112 | 2015-11-12 19:28:14 +01:00 |  | 
				
					
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									 Clifford Wolf | 207736b4ee | Import more std:: stuff into Yosys namespace | 2015-10-25 19:30:49 +01:00 |  | 
				
					
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									 Clifford Wolf | 924d9d6e86 | Added read-enable to memory model | 2015-09-25 12:23:11 +02:00 |  | 
				
					
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									 Clifford Wolf | 84bf862f7c | Spell check (by Larry Doolittle) | 2015-08-14 10:56:05 +02:00 |  | 
				
					
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									 Clifford Wolf | 6c84341f22 | Fixed trailing whitespaces | 2015-07-02 11:14:30 +02:00 |  | 
				
					
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									 Clifford Wolf | 61512b6f41 | Verific build fixes | 2015-05-17 08:19:52 +02:00 |  | 
				
					
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									 Clifford Wolf | fe829bdbdc | Added log_warning() API | 2014-11-09 10:44:23 +01:00 |  | 
				
					
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									 Clifford Wolf | acf010d30d | Added "ENABLE_PLUGINS := 0" to verific amd64 build instructions | 2014-11-08 11:38:44 +01:00 |  | 
				
					
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									 William Speirs | 31267a1ae8 | Header changes so it will compile on VS | 2014-10-17 11:41:36 +02:00 |  | 
				
					
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									 Clifford Wolf | 4569a747f8 | Renamed SIZE() to GetSize() because of name collision on Win32 | 2014-10-10 17:07:24 +02:00 |  | 
				
					
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									 Ruben Undheim | 79cbf9067c | Corrected spelling mistakes found by lintian | 2014-09-06 08:47:06 +02:00 |  | 
				
					
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									 Clifford Wolf | 7f734ecc09 | Added module->uniquify() | 2014-08-16 23:50:36 +02:00 |  | 
				
					
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									 Clifford Wolf | f092b50148 | Renamed $_INV_ cell type to $_NOT_ | 2014-08-15 14:11:40 +02:00 |  | 
				
					
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									 Clifford Wolf | 593264e9ed | Fixed building verific bindings | 2014-08-12 15:21:06 +02:00 |  | 
				
					
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									 Clifford Wolf | c6fd82c70b | Fixed build of verific bindings | 2014-07-31 16:45:23 +02:00 |  | 
				
					
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									 Clifford Wolf | e6d33513a5 | Added module->design and cell->module, wire->module pointers | 2014-07-31 14:11:39 +02:00 |  | 
				
					
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									 Clifford Wolf | 1cb25c05b3 | Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace | 2014-07-31 13:19:47 +02:00 |  | 
				
					
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									 Clifford Wolf | 7bd2d1064f | Using log_assert() instead of assert() | 2014-07-28 11:27:48 +02:00 |  | 
				
					
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									 Clifford Wolf | 7661ded8dd | Fixed verific bindings for new RTLIL api | 2014-07-27 12:00:28 +02:00 |  | 
				
					
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									 Clifford Wolf | 1488bc0c4f | Updated verific build/test instructions | 2014-07-25 12:16:03 +02:00 |  | 
				
					
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									 Clifford Wolf | 375aa71dfe | Various fixes in Verific frontend for new RTLIL API | 2014-07-23 21:35:01 +02:00 |  | 
				
					
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									 Clifford Wolf | a3b9692a68 | Fixed mapping of Verific WIDE_DFFRS operator | 2014-03-20 13:40:01 +01:00 |  | 
				
					
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									 Clifford Wolf | 470c2455e4 | Fixed mapping of Verific FADD primitive with unconnected outputs | 2014-03-20 13:26:52 +01:00 |  |