7 commits

Author	SHA1	Message	Date
luke whittlesey	2f90499e3d	$mem cell in verilog backend : grouped writes by clock	2015-06-08 17:35:40 -04:00
luke whittlesey	a8fe040906	Bug fix in $mem verilog backend + changed tests/bram flow of make test.	2015-06-04 16:12:40 -04:00
Clifford Wolf	45918b8315	Added "memory -bram"	2015-01-03 17:40:20 +01:00
Clifford Wolf	a7e43ae3d9	Progress in memory_bram	2015-01-03 10:57:01 +01:00
Clifford Wolf	bbf89c4dc6	Progress in memory_bram	2015-01-02 13:59:47 +01:00
Clifford Wolf	36c20f2ede	Progress in memory_bram	2015-01-02 00:07:44 +01:00
Clifford Wolf	24ae156a74	Progress in bram testbench	2015-01-01 20:58:33 +01:00