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Code Activity
8323 commits 122 branches 59 tags 72 MiB
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844 commits

Author SHA1 Message Date
Eddie Hung
275e937fc1 abc9: remove -markgroups option, since operates on fully selected mod 2020-01-06 10:43:21 -08:00
Eddie Hung
1cf974ff40 abc9: cleanup 2020-01-06 10:26:49 -08:00
Eddie Hung
f576721a37 Add abc9.dff scratchpad option 2020-01-06 09:46:02 -08:00
Eddie Hung
45f87bb8ad Merge remote-tracking branch 'origin/master' into xaig_dff 2020-01-06 09:44:17 -08:00
N. Engelhardt
7764b62d23 check scratchpad for arguments in abc pass too 2020-01-06 10:46:44 +01:00
N. Engelhardt
b376548fb9 inherit default values when checking scratchpad for arguments 2020-01-06 10:46:10 +01:00
N. Engelhardt
b2ad781b07 share codepath for scratchpad argument handling with command arguments 2020-01-03 14:11:41 +01:00
N. Engelhardt
341fd872b5 Merge branch 'master' of https://github.com/YosysHQ/yosys into abc_scratchpad_script 2020-01-03 12:28:48 +01:00
Eddie Hung
b454735bea Merge remote-tracking branch 'origin/master' into xaig_dff 2020-01-02 12:44:06 -08:00
Eddie Hung
ca42af56a4 Update doc 2020-01-02 12:41:57 -08:00
Eddie Hung
8e507bd807 abc9 -keepff -> -dff; refactor dff operations 2020-01-02 12:36:54 -08:00
Eddie Hung
d6242be802
Merge pull request #1601 from YosysHQ/eddie/synth_retime 
"abc -dff" to no longer retime by default
 2020-01-02 08:46:24 -08:00
Eddie Hung
6dc63e84ef Cleanup abc9, update doc for -keepff option 2020-01-01 08:34:57 -08:00
Eddie Hung
c40b1aae42 Restore abc9 -keepff 2020-01-01 08:34:43 -08:00
Eddie Hung
ac808c5e2a attributes.count() -> get_bool_attribute() 2020-01-01 08:33:32 -08:00
Miodrag Milanovic
e0c879684f take skip wire bits into account 2020-01-01 16:13:14 +01:00
Eddie Hung
96db05aaef parse_xaiger to not take box_lookup 2019-12-31 17:06:03 -08:00
Eddie Hung
cac7f5d82e Do not re-order carry chain ports, just precompute iteration order 2019-12-31 16:12:40 -08:00
Eddie Hung
4c3f517425 Remove delay targets doc 2019-12-30 16:11:42 -08:00
Eddie Hung
0735572934 write_xaiger to use scratchpad for stats; cleanup abc9 2019-12-30 15:35:33 -08:00
Eddie Hung
22fe931c86 Grammar 2019-12-30 15:07:15 -08:00
Eddie Hung
405e974fe5 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-12-30 14:31:42 -08:00
Eddie Hung
d7ada66497 Add "synth_xilinx -dff" option, cleanup abc9 2019-12-30 14:13:16 -08:00
Eddie Hung
566d9fb77f Revert "ABC to call retime all the time" 
This reverts commit 9aa94370a5.
 2019-12-30 13:28:29 -08:00
Eddie Hung
52a27700e2 Grammar 2019-12-30 12:26:39 -08:00
Marcin Kościelnicki
a24596def3 iopadmap: Emit tristate buffers with const OE for some edge cases. 2019-12-25 17:37:58 +01:00
Eddie Hung
509070f82f Disable clock domain partitioning in Yosys pass, let ABC do it 2019-12-23 08:36:20 -08:00
Eddie Hung
1ea1e8e54f Merge remote-tracking branch 'origin/master' into xaig_dff 2019-12-20 13:56:13 -08:00
Eddie Hung
979bf36fb0 Split into $__ABC9_ASYNC[01], do not add cell->type to clkdomain_t 2019-12-19 11:23:41 -08:00
Eddie Hung
3b559de6e9 Interpret "abc9 -lut" as lut string only if [0-9:] 2019-12-18 12:21:12 -08:00
Eddie Hung
c9c77a90b3 Remove &verify -s 2019-12-17 16:11:54 -08:00
Eddie Hung
b1b99e421e Use pool<> instead of std::set<> to preserver ordering 2019-12-17 16:10:40 -08:00
N. Engelhardt
c8bc1793a4 check scratchpad variable abc9.scriptfile 2019-12-17 19:39:55 +01:00
Eddie Hung
d9bf7061cd Put $__ABC9_{FF_,ASYNC} into same clock domain as abc9_flop 2019-12-16 16:49:48 -08:00
N. Engelhardt
91f427d719 check scratchpad variables for custom abc scripts 2019-12-13 12:54:52 +01:00
Eddie Hung
a46a7e8a67 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-12-06 23:22:52 -08:00
Eddie Hung
ab667d3d47 Call abc9 with "&write -n", and parse_xaiger() to cope 2019-12-06 16:35:57 -08:00
Eddie Hung
fce527f4f7 Fix abc9 re-integration, remove abc9_control_wire, use cell->type as 
as part of clock domain for mergeability class
 2019-12-06 16:20:18 -08:00
Eddie Hung
01a3cc29ba abc9 to do clock partitioning again 2019-12-05 17:26:22 -08:00
Marcin Kościelnicki
2abe38e73e
iopadmap: Refactor and fix tristate buffer mapping. (#1527) 
The previous code for rerouting wires when inserting tristate buffers
was overcomplicated and didn't handle all cases correctly (in
particular, only cell connections were rewired — internal connections
were not).
 2019-12-04 08:44:08 +01:00
Eddie Hung
d66d06b91d Add assertion 2019-12-03 19:21:42 -08:00
Eddie Hung
a181ff66d3 Add abc9_init wire, attach to abc9_flop cell 2019-12-03 18:47:09 -08:00
Eddie Hung
6398b7c17c Cleanup 2019-12-01 23:43:28 -08:00
David Shah
e9ce4e658b abc9: Fix breaking of SCCs 
Signed-off-by: David Shah <dave@ds0.me>
 2019-12-01 20:44:56 +00:00
Eddie Hung
6831510f5b Fix debug 2019-11-25 12:59:34 -08:00
Eddie Hung
d087024caf Merge remote-tracking branch 'origin/master' into xaig_dff 2019-11-25 12:42:09 -08:00
Eddie Hung
180cb39395 abc9 to contain time call 2019-11-25 12:35:57 -08:00
Eddie Hung
f50b6422b0 abc9 to no longer to clock partitioning, operate on whole modules only 2019-11-25 12:35:38 -08:00
Marcin Kościelnicki
6cdea425b8 clkbufmap: Add support for inverters in clock path. 2019-11-25 20:40:39 +01:00
Eddie Hung
bf1167bc64 Conditioning abc9 on POs not accurate due to cells 2019-11-23 10:26:55 -08:00