mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-14 12:58:45 +00:00
Code Activity
6341 commits 98 branches 53 tags 41 MiB
Commit graph

1 commit

Author SHA1 Message Date
Dan Ravensloft 67b4ce06e0 intel: Map M9K BRAM only on families that have it 
This regresses Cyclone V and Cyclone 10 substantially, but these
numbers were artificial, targeting a BRAM that they did not contain.

Amusingly, synth_intel still does better when synthesizing PicoSoC
than Quartus when neither are inferring block RAM.
 2019-07-23 18:11:11 +01:00
Renamed from techlibs/intel/common/brams_map.v (Browse further)