mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00
Code Activity
4767 commits 95 branches 53 tags 45 MiB
Commit graph

4767 commits

This branch
This branch
All branches
Author SHA1 Message Date
Eddie Hung
9aa94370a5 ABC to call retime all the time 2019-04-18 08:46:41 -07:00
Clifford Wolf
f4abc21d8a Add "whitebox" attribute, add "read_verilog -wb" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-18 17:45:47 +02:00
Eddie Hung
6008bb7002 Revert "synth_* with -retime option now calls abc with -D 1 as well" 
This reverts commit 9a6da9a79a.
 2019-04-18 07:59:16 -07:00
Eddie Hung
0642baabbc Merge branch 'master' into eddie/fix_retime 2019-04-18 07:57:17 -07:00
Clifford Wolf
88be1cbfa5 Improve proc full_case detection and handling, fixes #931 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-18 15:13:47 +02:00
Clifford Wolf
ea8ac0aaad Update to ABC d1b6413 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-17 13:51:34 +02:00
Eddie Hung
2df7d97b72
Merge pull request #939 from YosysHQ/revert895 
Revert #895 (mux-to-shiftx optimisation)
 2019-04-16 11:59:21 -07:00
Eddie Hung
4da4a6da2f Revert #895 2019-04-16 11:07:51 -07:00
Eddie Hung
dca45c0888
Merge pull request #937 from YosysHQ/revert-932-eddie/fixdlatch 
Revert "Recognise default entry in case even if all cases covered (fix for #931)"
 2019-04-15 18:39:20 -07:00
Eddie Hung
b3378745fd
Revert "Recognise default entry in case even if all cases covered (fix for #931)" 2019-04-15 17:52:45 -07:00
Eddie Hung
18a4045858
Merge pull request #936 from YosysHQ/README-fix-quotes 
README: fix some incorrect quoting
 2019-04-15 12:22:05 -07:00
whitequark
6323e73cc9
README: fix some incorrect quoting. 2019-04-15 14:29:46 +00:00
Diego
f9272fc56d GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow 2019-04-12 23:40:02 -05:00
Eddie Hung
db1a5ec6a2
Merge pull request #928 from litghost/add_xc7_sim_models 
Add additional cells sim models for core 7-series primitives.
 2019-04-12 11:52:45 -07:00
Keith Rothman
1f9235ede5 Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-12 09:35:15 -07:00
Clifford Wolf
9d6586b4e1
Merge pull request #933 from dh73/master 
Fixing issues in CycloneV cell sim
 2019-04-12 14:57:36 +02:00
Clifford Wolf
48bc203653
Merge pull request #932 from YosysHQ/eddie/fixdlatch 
Recognise default entry in case even if all cases covered (fix for #931)
 2019-04-12 14:57:01 +02:00
Diego
643ae9bfc5 Fixing issues in CycloneV cell sim 2019-04-11 19:59:03 -05:00
Eddie Hung
7685469ee2 Add default entry to testcase 2019-04-11 15:03:40 -07:00
Eddie Hung
adc6efb584 Recognise default entry in case even if all cases covered (#931) 2019-04-11 12:34:51 -07:00
Eddie Hung
9a6da9a79a synth_* with -retime option now calls abc with -D 1 as well 2019-04-10 08:32:53 -07:00
Eddie Hung
5f4024ffd2 Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen" 
This reverts commit 19271bd996.
 2019-04-10 08:31:40 -07:00
Eddie Hung
78d35a86c0 Revert ""&nf -D 0" fails => use "-D 1" instead" 
This reverts commit 3c253818ca.
 2019-04-10 08:31:35 -07:00
Eddie Hung
c89cd48f58 Merge remote-tracking branch 'origin/master' into eddie/fix_retime 2019-04-10 08:23:00 -07:00
Keith Rothman
e107ccdde8 Fix LUT6_2 definition. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-09 11:43:19 -07:00
Zachary Snow
5855024ccc support repeat loops with constant repeat counts outside of constant functions 2019-04-09 12:28:32 -04:00
Keith Rothman
5e0339855f Add additional cells sim models for core 7-series primatives. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-09 09:01:53 -07:00
Eddie Hung
0deaccbaae
Fix a few typos 2019-04-08 16:46:33 -07:00
Clifford Wolf
e194e65358
Merge pull request #919 from YosysHQ/multiport_transp 
memory_bram: Fix multiport make_transp
 2019-04-08 21:14:05 +02:00
David Shah
2bf3ca6443 memory_bram: Fix multiport make_transp 
Signed-off-by: David Shah <dave@ds0.me>
 2019-04-07 16:56:31 +01:00
Benedikt Tutzer
e19981ab61 Suppress error from the compiler run during libboost-python* detection 2019-04-07 10:11:35 +02:00
Eddie Hung
ad602438b8 Add retime test 2019-04-05 16:28:46 -07:00
Eddie Hung
d559023007 Fix S0 -> S1 2019-04-05 16:28:14 -07:00
Eddie Hung
9758701574 Move techamp t:$_DFF_?N? to before abc call 2019-04-05 15:39:05 -07:00
Eddie Hung
23a6533e98 Retry 2019-04-05 15:31:54 -07:00
Eddie Hung
3c253818ca "&nf -D 0" fails => use "-D 1" instead 2019-04-05 15:30:19 -07:00
Eddie Hung
8b6085254a Resolve @daveshah1 comment, update synth_xilinx help 2019-04-05 15:15:13 -07:00
Eddie Hung
ff0912c75e synth_xilinx to techmap FFs after abc call, otherwise -retime fails 2019-04-05 14:43:06 -07:00
Eddie Hung
19271bd996 abc -dff now implies "-D 0" otherwise retiming doesn't happen 2019-04-05 14:42:25 -07:00
Clifford Wolf
dfb242c905 Add "read_ilang -lib" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-05 17:31:49 +02:00
Benedikt Tutzer
cc270ea81b Autodetect Python paths and boost python libraries for different distributions 2019-04-05 11:56:01 +02:00
Clifford Wolf
75ca06526a Added missing argument checking to "mutate" command 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-04 18:10:10 +02:00
Eddie Hung
e3f20b17af Missing techmap entry in help 2019-04-04 08:13:10 -07:00
Eddie Hung
d9cb787391 synth_xilinx to map_cells before map_luts 2019-04-04 07:48:13 -07:00
Benedikt Tutzer
cae657cebd Used PyImport_ImportModule instead of PyImport_Import to avoid the explicit conversion to a python string 2019-04-04 10:35:01 +02:00
Benedikt Tutzer
574dfb2ef9 Removed link to experimental filesystem library 2019-04-04 09:51:14 +02:00
Benedikt Tutzer
e64b3f1074 Changed filesystem dependency to boost instead of experimental std library 2019-04-04 09:24:50 +02:00
Benedikt Tutzer
c3486c4270 Removed compiler flags that are clang specific 2019-04-03 16:19:47 +02:00
Benedikt Tutzer
d330f4e009 Even less options for the preprocessor 2019-04-03 15:34:31 +02:00
Eddie Hung
ef84b434a5
Merge pull request #913 from smunaut/fix_proc_mux 
proc_mux: Fix crash when trying to optimize non-existant mux to shiftx
 2019-04-03 06:27:41 -07:00