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Author	SHA1	Message	Date
Clifford Wolf	6a40e46a04	Added -try option to freduce pass	2013-08-08 10:56:27 +02:00
Clifford Wolf	8cd153612e	Added "clean" command (less verbose opt_clean)	2013-08-08 10:53:37 +02:00
Clifford Wolf	56e01ce389	Fixed topological ordering in freduce pass	2013-08-07 19:38:19 +02:00
Clifford Wolf	e729857647	Improved handling of private names in opt_clean and rename commands	2013-08-07 18:39:49 +02:00
Clifford Wolf	3f5d7df603	Added stubnets example to manual prog chapter	2013-08-07 02:19:35 +02:00
Clifford Wolf	653750faac	Small bugfixes in freduce pass	2013-08-06 15:53:09 +02:00
Clifford Wolf	6efca9ea5a	Added freduce command	2013-08-06 15:04:52 +02:00
Clifford Wolf	117489f95a	Fixed SigPool::del() method	2013-08-06 15:04:24 +02:00
Clifford Wolf	ff965424c2	Added proper deallocation of history buffer	2013-08-06 15:03:46 +02:00
Clifford Wolf	8b2f7792ba	Updated TODO section in README	2013-08-01 20:02:15 +02:00
Clifford Wolf	0f38008ed3	Added "design" command (-reset, -save, -load)	2013-07-27 14:27:51 +02:00
Clifford Wolf	974b6a947c	Added "help -write-web-command-reference-manual"	2013-07-26 00:01:31 +02:00
Clifford Wolf	98906b211c	Fixed comments in manual rtlil/ilang syntax	2013-07-25 15:01:02 +02:00
Clifford Wolf	36c39cbd04	Added RTLIL and Liberty syntax highlighting to manual	2013-07-25 14:00:16 +02:00
Clifford Wolf	88d0829d65	Automatically run "proc" on extract map files	2013-07-24 20:19:08 +02:00
Clifford Wolf	ad9bbcbf40	Added $lut cells and abc lut mapping support	2013-07-23 16:19:34 +02:00
Clifford Wolf	d815f1c770	Fixed "make clean" for manual files	2013-07-23 14:19:47 +02:00
Clifford Wolf	3bb1996151	Added web site link to README	2013-07-21 15:04:37 +02:00
Clifford Wolf	61ed6b32d1	Added Yosys Manual	2013-07-20 15:19:12 +02:00
Clifford Wolf	3650fd7fbe	More fixes in ternary op sign handling	2013-07-12 13:13:04 +02:00
Clifford Wolf	ded769c98c	Fixed sign handling in ternary operator	2013-07-12 01:15:37 +02:00
Clifford Wolf	3cd97a205f	Added ast frontend refactoring to TODO	2013-07-11 19:31:57 +02:00
Clifford Wolf	b380c8c790	Another vloghammer related bugfix	2013-07-11 19:24:59 +02:00
Clifford Wolf	a9fefc6ce1	Bugfixes for empty signal vectors	2013-07-10 12:52:29 +02:00
Clifford Wolf	ed62fcdbe2	Fixed sign propagation in bit-wise operators	2013-07-09 23:53:55 +02:00
Clifford Wolf	5dab327b30	More fixes in ast expression sign/width handling	2013-07-09 23:41:43 +02:00
Clifford Wolf	618b2ac994	Merge branch 'master' of github.com:cliffordwolf/yosys	2013-07-09 19:00:10 +02:00
Clifford Wolf	7daeee340a	Fixed shift ops with large right hand side	2013-07-09 18:59:59 +02:00
Clifford Wolf	00a6c1d9a5	Major redesign of expr width/sign detecion (verilog/ast frontend)	2013-07-09 14:31:57 +02:00
Clifford Wolf	e8da3ea7b6	Fixed another bug found using vloghammer	2013-07-07 16:49:30 +02:00
Clifford Wolf	eff68560a2	Fixed AST_CONSTANT node generation	2013-07-07 15:40:26 +02:00
Clifford Wolf	52d21a63ca	Removed tests/xsthammer ... This test is now available as 'vloghammer' in a seperate repository: https://github.com/cliffordwolf/VlogHammer	2013-07-07 13:01:15 +02:00
Clifford Wolf	cf885c4a28	Added opt_clean -purge option	2013-07-07 12:59:30 +02:00
Clifford Wolf	0c0197cf45	Fixed handling of $eq and $ne in opt_const	2013-07-07 12:59:00 +02:00
Clifford Wolf	92a5961fd3	Fixed vivado related xsthammer bugs	2013-07-05 19:33:42 +02:00
Clifford Wolf	940f838dae	Various improvements in xsthammer report generator	2013-07-05 16:04:02 +02:00
Clifford Wolf	3fd37061bf	Added work-around to isim bug in xsthammer report script	2013-07-05 15:29:03 +02:00
Clifford Wolf	f519297da9	Fixed gcc warnings in ezminisat	2013-07-05 15:00:20 +02:00
Clifford Wolf	238ff14810	Added CARRY4 Xilinx cell to xsthammer cell lib	2013-07-05 14:46:33 +02:00
Clifford Wolf	45105faf25	Added xsthammer report generator	2013-07-05 14:46:06 +02:00
Clifford Wolf	cd33db25d1	Improved xsthammer quartus support	2013-07-04 21:26:49 +02:00
Clifford Wolf	14c84c111b	Added Altera Cyclon III cell library to xsthammer	2013-07-04 14:50:03 +02:00
Clifford Wolf	a4fd3cde8c	Documentation updates	2013-07-04 14:17:25 +02:00
Clifford Wolf	56432a920f	Added defparam support to Verilog/AST frontend	2013-07-04 14:12:33 +02:00
Clifford Wolf	3b294b3912	Added QMAKE makefile variable	2013-07-03 23:54:43 +02:00
Clifford Wolf	be1fca3428	Added Altera Quartus support to xsthammer	2013-07-03 20:40:54 +02:00
Clifford Wolf	28539541ed	Progress in xsthammer	2013-07-03 11:19:18 +02:00
Clifford Wolf	a5fe2565b7	Added vivado support to xsthammer	2013-06-26 12:34:06 +02:00
Clifford Wolf	101491132f	Added SAT support for -all/-max with -verify	2013-06-23 13:28:30 +02:00
Clifford Wolf	46b177eb8a	Merge branch 'master' of github.com:cliffordwolf/yosys	2013-06-20 12:49:28 +02:00