Robert O'Callahan
5600eb2e5b
Update passes/opt to avoid bits()
2025-09-16 03:17:23 +00:00
Emil J. Tywoniak
785bd44da7
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
Martin Povišer
030d639201
opt_mem, memory_*: Refuse to operate in presence of processes
...
Processes can contain `MemWriteAction` entries which are invisible to
most passes operating on memories but which will be lowered to write
ports later on by `proc_memwr`. For that reason we can get corrupted
RTLIL if we sequence the memory passes before `proc`. Address that by
making the affected memory passes ignore modules with processes.
2024-02-23 12:27:53 +01:00
Marcelina Kościelnicka
77b1dfd8c3
opt_mem: Remove constant-value bit lanes.
2022-05-07 23:13:16 +02:00
Claire Xenia Wolf
72787f52fc
Fixing old e-mail addresses and deadnames
...
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g ;
2021-06-08 00:39:36 +02:00
Marcelina Kościelnicka
e6b078d156
opt_mem: Add reset/init value support.
2021-05-25 20:06:00 +02:00
Marcelina Kościelnicka
a23d9409e7
opt_mem: Remove write ports with const-0 EN.
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Fixes #2765 .
2021-05-23 14:30:56 +02:00
Marcelina Kościelnicka
06141db233
opt_mem: Use Mem helpers.
2020-10-21 17:51:20 +02:00
whitequark
7191dd16f9
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
Eddie Hung
956ecd48f7
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
Clifford Wolf
03fb92ed6f
Add "opt_mem" pass
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-11-22 17:45:22 +01:00
