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Code Activity
10012 commits 122 branches 59 tags 71 MiB
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54 commits

Author SHA1 Message Date
Clifford Wolf
bada3ee815 Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh 2014-03-11 11:59:58 +01:00
Clifford Wolf
4fd1a4c12b Use "verilog -noattr" in tests/techmap/mem_simple_4x1 test (for old iverilog) 2014-03-11 11:39:30 +01:00
Clifford Wolf
3c5e973092 Use private namespace in mem_simple_4x1_map 2014-02-21 12:14:38 +01:00
Clifford Wolf
81b3f52519 Added tests/techmap/mem_simple_4x1 2014-02-21 12:06:40 +01:00