3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-14 04:48:46 +00:00
Commit graph

1 commit

Author SHA1 Message Date
Dan Ravensloft 85a14895ca synth_intel: a10gx -> arria10gx 2019-12-10 13:48:10 +00:00
Renamed from techlibs/intel/a10gx/cells_sim.v (Browse further)