mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-18 21:25:47 +00:00
Code Activity

Bump yosys to latest

Browse source
This commit is contained in:
Akash Levy 2026-02-03 06:08:36 -08:00
commit 8e5d24aa6b
8 changed files with 95 additions and 38 deletions
Download patch file Download diff file Expand all files Collapse all files

6
kernel/rtlil.cc
View file

@ -1612,12 +1612,6 @@ std::vector<RTLIL::Module*> RTLIL::Design::selected_modules(RTLIL::SelectPartial
return result;
}
void RTLIL::Design::run_pass(std::string command) {
log("\n-- Running command `%s' --\n", command.c_str());
Pass::call(this, command);
log_flush();
}
RTLIL::Module::Module()
{
static unsigned int hashidx_count = 123456789;

3
kernel/rtlil.h
View file

@ -2039,9 +2039,6 @@ struct RTLIL::Design
// partially selected or boxed modules have been ignored
std::vector<RTLIL::Module*> selected_unboxed_whole_modules_warn() const { return selected_modules(SELECT_WHOLE_WARN, SB_UNBOXED_WARN); }
// SILIMATE ADDED TO IMPROVE PYOSYS API
void run_pass(std::string command);
static std::map<unsigned int, RTLIL::Design*> *get_all_designs(void);
std::string to_rtlil_str(bool only_selected = true) const;