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This commit is contained in:
Emil J. Tywoniak 2024-06-13 21:37:22 +02:00
parent 866b7a7121
commit 4c9f68216a
8 changed files with 10 additions and 10 deletions

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@ -361,7 +361,7 @@ bool rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool verbos
// gather the usage information for cells
for (auto &it : module->cells_) {
RTLIL::Cell *cell = it.second;
for (auto &it2 : cell->connections_) {
for (auto it2 : cell->connections_) {
assign_map.apply(it2.second); // modify the cell connection in place
raw_used_signals.add(it2.second);
used_signals.add(it2.second);