3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-09 20:50:51 +00:00
This commit is contained in:
Emil J. Tywoniak 2024-06-13 21:37:22 +02:00
parent 866b7a7121
commit 4c9f68216a
8 changed files with 10 additions and 10 deletions

View file

@ -105,7 +105,7 @@ struct ConnwrappersWorker
for (auto cell : module->selected_cells())
{
for (auto &&conn : cell->connections_)
for (auto conn : cell->connections_)
{
std::vector<RTLIL::SigBit> sigbits = sigmap(conn.second).to_sigbit_vector();
RTLIL::SigSpec old_sig;