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tiny fix

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This commit is contained in:
Emil J. Tywoniak 2024-06-13 21:37:22 +02:00
parent 866b7a7121
commit 4c9f68216a
8 changed files with 10 additions and 10 deletions
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2
passes/cmds/connwrappers.cc
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@ -105,7 +105,7 @@ struct ConnwrappersWorker
for (auto cell : module->selected_cells())
{
for (auto &&conn : cell->connections_)
for (auto conn : cell->connections_)
{
std::vector<RTLIL::SigBit> sigbits = sigmap(conn.second).to_sigbit_vector();
RTLIL::SigSpec old_sig;

2
passes/cmds/splice.cc
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@ -188,7 +188,7 @@ struct SpliceWorker
for (auto cell : mod_cells) {
if (!sel_by_wire && !design->selected(module, cell))
continue;
for (auto &&conn : cell->connections_)
for (auto conn : cell->connections_)
if (ct.cell_input(cell->type, conn.first)) {
if (ports.size() > 0 && !ports.count(conn.first))
continue;