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main 99f7d79abb · Bump version · Updated 2025-07-05 00:23:55 +00:00

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backends/verilog/verilog_backend.cc 45452c18b2 · write_verilog: write module ports in order · Updated 2025-05-14 12:34:50 +00:00	132 1		ZIP  TAR.GZ
emil/fix-design-lifetime-with-pyosys 586fa033a6 · design: ensure all_modules outlives pass when building WITH_PYTHON · Updated 2025-05-10 15:19:51 +00:00	132 1		ZIP  TAR.GZ
emil/check-harder 068dd77a14 · check: fix up tests · Updated 2025-05-08 13:30:49 +00:00	236 6		ZIP  TAR.GZ
emil/check-harder-fix-tests 68c11321c0 · remove invalid tests · Updated 2025-05-07 15:52:31 +00:00	236 3		ZIP  TAR.GZ
krys/fix_4983 414a1bf278 · autoname: Check for potential overflow · Updated 2025-04-30 23:57:49 +00:00	159 1		ZIP  TAR.GZ
emil/aiger-no_version 11c846de5c · aiger, xaiger, aiger2: add -no_version · Updated 2025-04-30 17:51:35 +00:00	163 1		ZIP  TAR.GZ
emil/quicklogic-sv-empty-param-workaround ff2a8af545 · quicklogic: workaround for #5069 · Updated 2025-04-28 14:01:12 +00:00	173 1		ZIP  TAR.GZ
emil/fix-dangling-wiretype-2 f0545d5bc1 · simplify: fix another struct wiretype attr memory leak · Updated 2025-04-28 11:18:00 +00:00	173 1		ZIP  TAR.GZ
emil/astnode-gc a5458d21ef · fixup! fixup! fixup! ast: add GC for dev debugging · Updated 2025-04-25 09:10:16 +00:00	195 6		ZIP  TAR.GZ
emil/idstring-modern 272b7fa697 · fixup! rtlil: less sketchy IdString interner lifetime · Updated 2025-04-24 09:42:17 +00:00	195 2		ZIP  TAR.GZ
emil/dump-sorted da22d376bf · dump: sort lhs and rhs in a connection · Updated 2025-04-23 20:46:21 +00:00	419 2		ZIP  TAR.GZ
emil/fix-x-check_opt 532f9abc72 · opt_clean: hide it behind -x · Updated 2025-04-23 20:41:04 +00:00	419 2		ZIP  TAR.GZ
emil/mike-liberty-paren-rebased 54ea41c40c · Add test to verify that the liberty format is properly parsed. · Updated 2025-04-23 19:41:13 +00:00	201 2		ZIP  TAR.GZ
krys/update_evals 365c144a3d · ci: Run test_cell · Updated 2025-04-21 22:20:39 +00:00	218 8		ZIP  TAR.GZ
emil/mlir-roundtrip f95de7d340 · fixup! fixup! dump: sort lhs and rhs in a connection · Updated 2025-04-14 12:48:34 +00:00	419 8		ZIP  TAR.GZ
emil/techmap-alu-half-adder 7d560698ac · techmap: map $alu to $fa instead of relying on extract_fa · Updated 2025-04-07 11:16:49 +00:00	419 1		ZIP  TAR.GZ
krys/cell_type_selections eb5abf9c12 · test_cell: Add $bweqx, kinda · Updated 2025-03-31 03:39:13 +00:00	560 13		ZIP  TAR.GZ
krys/update_gcc f2d7833b2b · test-compile: gcc-14 as newest · Updated 2025-03-27 21:31:06 +00:00	372 2		ZIP  TAR.GZ
emil/segfault-test-abc aa4d59cdcb · Trigger abc segfault for testing · Updated 2025-03-26 11:20:57 +00:00	419 1		ZIP  TAR.GZ
krys/primitive_array_error 0a1c664f02 · simplify: Skip AST_PRIMITIVE in AST_CELLARRAY · Updated 2025-03-24 23:15:54 +00:00	382 1		ZIP  TAR.GZ